Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1997-11-17
2000-04-25
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
375356, 375358, H04L 2540
Patent
active
060552859
ABSTRACT:
A synchronization circuit synchronizes the transfer of pointer values from a transmitting circuit operating in a first clock domain to a receiving circuit operating in a second clock domain, wherein the first clock domain and the second clock domain are mutually asynchronous. An input latch operating in response to a first synchronization signal generated in the first clock domain transfers a pointer value to a latched pointer bus. The first synchronization signal is provided as an input to a synchronization section which generates a second synchronization signal in the second clock domain. The second synchronization signal enables an output latch to transfer the pointer value on the latched pointer bus to an output bus. The pointer value on the output bus is thus synchronized in the second clock domain. The second synchronization signal is then provided as an input to a synchronization section which generates the first synchronization signal in the first clock domain. The first synchronization signal initiates the transfer of the next pointer value to the latched pointer bus. The synchronization circuit operates alternately to generate the first synchronization signal in the first clock domain and the second synchronization signal in the second clock domain to latch a pointer value onto the latched pointer bus in the first clock domain and to output the pointer value from the latched pointer bus in the second clock domain.
REFERENCES:
patent: 4255960 (1981-03-01), Masters
patent: 4390969 (1983-06-01), Hayes
patent: 4408333 (1983-10-01), Fujii
patent: 4498176 (1985-02-01), Wagner
patent: 4745302 (1988-05-01), Hanawa et al.
patent: 4851710 (1989-07-01), Grivna
patent: 4866606 (1989-09-01), Kopetz
patent: 4873703 (1989-10-01), Crandall et al.
patent: 4920535 (1990-04-01), Watanabe et al.
patent: 4926445 (1990-05-01), Robb
patent: 4935942 (1990-06-01), Hwang et al.
patent: 4965465 (1990-10-01), Denda
patent: 4973860 (1990-11-01), Ludwig
patent: 5012127 (1991-04-01), Gates et al.
patent: 5083049 (1992-01-01), Kagey
patent: 5117442 (1992-05-01), Hall
patent: 5146585 (1992-09-01), Smith, III
patent: 5155745 (1992-10-01), Sugawara et al.
patent: 5237593 (1993-08-01), Fisher et al.
patent: 5276807 (1994-01-01), Kodama et al.
patent: 5331669 (1994-07-01), Wang et al.
patent: 5563891 (1996-10-01), Wang
patent: 5604773 (1997-02-01), Urala
patent: 5651034 (1997-07-01), Oksanen et al.
patent: 5729719 (1998-03-01), Gates
patent: 5905766 (1999-05-01), Nguyen
patent: 5956748 (1999-09-01), New
Chin Stephen
Jiang Lenny
QLogic Corporation
LandOfFree
Synchronization circuit for transferring pointer between two asy does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Synchronization circuit for transferring pointer between two asy, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronization circuit for transferring pointer between two asy will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-999721