Synchronising circuit

Details Synchronising circuit Synchronising circuit

2007-06-26

2007-06-26

Tran, Khai (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S376000

Reexamination Certificate

active

10624280

ABSTRACT:
In an integrated circuit receiving multiple serial data streams in parallel, a local clock is generated from each data stream and is synchronized with the data stream. Sometimes a data stream may have no transitions making it difficult to keep the clock synchronized with its data. A clock channel is provided, which always has edges. A circuit is provided for each data stream which measures the time elapsed since the data stream had an edge. After a certain period, the phase of the local clock is nudged towards that of the clock channel. Thereafter, the longer there are no edges on the data stream the more frequently nudges towards the phase of the clock channel are made.

REFERENCES:
patent: 4166979 (1979-09-01), Waggener
patent: 4677647 (1987-06-01), Aoyagi
patent: 2002/0196889 (2002-12-01), Tamura et al.
patent: 2004/0252804 (2004-12-01), Aoyama
patent: 1 385 307 (2004-01-01), None
Brian Watson, “Improvements In or Relating to Clock Regenerators” Patent Specification 1 571 784, Published Jul. 16, 1980.

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