Symmetrical NOR gates

Details Symmetrical NOR gates Symmetrical NOR gates

1997-10-27

2000-08-01

Nelms, David

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

326112, 326119, 326106, 326108, 327170, H03K 19094

Patent

active

06097222&

ABSTRACT:
A NOR gate including a pull-down circuit coupled to a pull-up circuit. The NOR gate is configured to drive an output signal to a low logic state at a substantially uniform slew rate regardless of the number of input signals that are in high logic state. The pull-down circuit may include a first plurality of transistor circuits each coupled to a corresponding one of the plurality of input signals, and a second plurality of transistor circuits each comprising a plurality of transistors coupled in parallel with each other and coupled to a corresponding one of the plurality of input signals or a complement of a corresponding one of the plurality of input signals. The first and second plurality of transistor circuits may each include an n-channel MOS (NMOS) transistor. The NOR gate may be incorporated into a decoder of a synchronous or asynchronous input path circuit to generally reduce the set-up and hold time window of the input path circuit.

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