Electronic digital logic circuitry – Exclusive function – With field-effect transistor
Reexamination Certificate
2006-08-08
2006-08-08
Cho, James H. (Department: 2819)
Electronic digital logic circuitry
Exclusive function
With field-effect transistor
C326S115000
Reexamination Certificate
active
07088138
ABSTRACT:
A CML XOR logic circuit is provided that includes a pair of pull-up transistors, a pair of current source transistors and a logic switch network coupled between the pull-up transistors and the current source transistors. The logic switch network including a plurality of transistors divided into a first branch, a second branch and a third branch. A tail current flows through the first branch, the second branch or the third branch based on at least two input signals to the plurality of transistors.
REFERENCES:
patent: 6008670 (1999-12-01), Pace et al.
patent: 6094074 (2000-07-01), Chi et al.
patent: 6188339 (2001-02-01), Hasegawa
Bernard Antaki, et al.; “Design for Testability Method for CML Digital Circuits;” Ecole Polytechnique, Montreal, Quebec, Canada & Nortel Networks, Ottawa, Ontario, Canada, date unknown.
M. Alioto et al., “Modeling and Optimized Design of Current Mode MUX/XOR and D Flip-Flop;” IEEE Transactions on Circuits and Systems—II: Analog and Digital Signal Processing vol. 47, No. 5, May 2000.
K. Zhou et al., Implementation of Gigahertz 1-bit Full Adder on SiGe FPGA; Rensselaer Polytechnic Institute, Troy NY, date unknown.
Jafar Savoj et al. “A 10-Gb/s CMOS Clock and Data Recovery Circuit;” 2000 Symposium on VLSI Circuits Digest of Technical Papers pp. 136-139; date at least 2000, no month.
Karnik Tanay
Paillet Fabrice
Xu Jianping
Cho James H.
Fleshner & Kim LLP
Intel Corporation
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