Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling
Reexamination Certificate
2006-11-21
2006-11-21
Peikari, B. James (Department: 2189)
Electrical computers and digital processing systems: virtual mac
Task management or control
Process scheduling
C718S105000, C710S052000, C711S005000, C711S170000
Reexamination Certificate
active
07140023
ABSTRACT:
According to some embodiments, a portion of local memory allocated to a thread by a programming statement includes an indication of a read/write status of the portion and symbolically references a buffer name wherein the symbolically referenced buffer name includes both letters and numbers.
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patent: 5953530 (1999-09-01), Rishi et al.
patent: 6058460 (2000-05-01), Nakhimovsky
patent: 6925546 (2005-08-01), Krejsa
The Processing Element, Liljqvist Bjorn, nplogic, May 29, 2003□□http://web.archive.org/web/20030529131332/http://tech.nplogic.com/architecture/pe/html.
Naik Uday R.
Tong Khoi-Nguyen T.
Tran Dennis D.
Vipat Harshawardhan
Buckley Maschoff & Talwalkar LLC
Peikari B. James
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