Electrical computers and digital data processing systems: input/ – Intrasystem connection – Protocol
Reexamination Certificate
1999-07-30
2003-12-30
Vo, Tim (Department: 2189)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Protocol
C710S308000, C710S316000
Reexamination Certificate
active
06671760
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a switching system, for controlling internal apparatuses provided within an exchange system, based on DMA (Direct Memory Access) communication and an SD/SCN (Signal Distributor/Scanner) signal.
2. Description of the Related Art
In general, an exchange system is formed by a central controller and a switching module including a plurality of objective apparatuses to be controlled by the central controller. The data transfer between the central controller and the plurality of objective apparatuses are performed based on DMA communication and an SD/SCN signal used as control data. In the exchange system, there is a switching system for transferring the control data in order to check and control the internal apparatuses from a processor access controller provided in the central control apparatus.
In a conventional system, however, there are some problems as briefly explained below.
First, in a method of transferring the control data based on the SD/SCN signal in accordance with a handshake procedure after termination of the DMA communication, it is very difficult to realize high speed control because of delays in various procedures at the DMA communication.
Second, when a link for the DMA communication is not established between the central controller and the objective apparatus, it is impossible to transfer the control data based on the SD/SCN signal between the central controller and each objective apparatus, and to perform an appropriate control for each objective apparatus based on the SD/SCN signal.
Third, it is necessary to transfer data including various parameters in order to control call processes and to collect charging data, and these data are transferred in accordance with the handshake procedure based on the DMA communication. However, since various control data based on the SD/SCN signal and call process information based on the DMA communication are transferred in accordance with the same handshake procedure, the efficiency of data transfer becomes worse and the call process rate is not improved.
Fourth, since the control data are transferred through signal lines each using a known metallic transmission cable, there are various disadvantageous points, as follows. That is, it is impossible to increase transfer frequency to more than several tens of MHz, the above metallic transmission cable emits much radio energy to an external environment, and much emission of radio energy results in the occurrence of noise.
Accordingly, in the switching system for controlling internal apparatuses provided within the exchange system, the present invention aims to solve the above conventional problems and to realize high speed data transfer and high reliability based on the DMA communication and the SD/SCN signal between the central controller and each objective apparatus. Further, the present invention aims to realize transfer of the control data without emission of radio energy to an external environment.
SUMMARY OF THE INVENTION
The primary object of the present invention is to provide a switching system for controlling internal apparatuses provided within an exchange system which can realize high speed data transfer and high reliability based on the DMA communication and the SD/SCN signal between the central controller and each objective apparatus.
Another object of the present invention is to provide a switching system for controlling internal apparatuses provided within an exchange system which can realize transfer of the control data without emission of radio energy to the external environment.
In accordance with a first aspect of the present invention, there is provided a switching system comprising: a central controller which transfers control data to a plurality of end units; and a switching module including a processor access controller which relays the control data transferred between the central processor and the plurality of end units; wherein the central controller and the processor access controller comprise a transmitter and receiver which set the control data based on a direct memory access (DMA) communication therebetween and based on SD/SCN signal, to each bit position of each fixed time slot.
In accordance with another aspect of the present invention, there is provided a switching system for controlling internal apparatuses provided within an exchange system which includes a central controller and as witching module including a plurality of objective apparatuses, each objective apparatus including a control data end unit, controlled by the central controller based on DMA communication and SD/SCN signal, wherein:
the central controller comprises a first processor access controller which transfers control data to the control data end unit, in order to check and control each of objective apparatus, based on the DMA communication and the SD/SCN signal;
the switching module comprises a second processor access controller which relays the control data transferred between the first processor access controller and a plurality of control data end units based on the DMA communication and the SD/SCN signal;
each of the first and second processor access controllers comprises a transmitter and a receiver which sets the control data based on the DMA communication and the control data based on the SD/SCN signal to a bit position of a fixed time slot, and transfers the control data by using an optical signal; and
the second processor access controller comprises a DMA connection selector which switches connection path in accordance with an address of a first transmission request packet unit, and sends the control data based on the DMA communication to a predetermined path; and
the second processor access controller further comprises a transfer unit which periodically transfers the control data based on the SD/SCN signal to the bit position of the fixed time slot.
In a preferred embodiment, the processor access controller comprises a transfer unit which copies a particular SD signal data bit within a plurality of SD signal data transferred from the central controller in order to control the objective apparatus, and transfers simultaneously the copied SD signal data bit to the control data end units in each objective apparatus.
In another preferred embodiment, the processor access controller performs priority selection based on an apparatus number of each objective apparatus, when receiving control data transmission requests based on the DMA communication which are generated simultaneously by the plurality of objective apparatuses and are sent to the central controller, and switches the connection path in the DMA connection selector to the preferentially selected objective apparatus.
In still another preferred embodiment, each of the central controller and the processor access controller comprises a setting unit which sets a signal indicating procedures based on the DMA communication to the bit position of the fixed time slot.
In still another preferred embodiment, each of the central controller and the processor access controller comprises a transfer unit which edits the control data bit of the SD/SCN signal into a data format by attaching the CRC error correction code for each objective apparatus.
In still another preferred embodiment, each of the central controller and the processor access controller comprises a transfer unit which transfers the control data by switching alternately between a through transfer and an inversion transfer, the through transfer being performed by sending the control data with a predetermined block without any change, and the inversion transfer being performed by sending the control data after inversion, except for synchronous pattern.
In still another preferred embodiment, each of the central controller and the processor access controller comprises a setting unit which sets a fixed bit which becomes inconsistent between sequential synchronous patterns having predetermined numbers and the control data, to a particular bit position in the control data area.
REFERENC
Fujihira Atsushi
Iwasa Hidetoshi
Kawasaki Hiroya
Kira Masaki
Mitsuze Kiyofumi
Fujitsu Limited
Katten Muchin Zavis & Rosenman
Vo Tim
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