Switch mode power supply with reduced switching losses

Details Switch mode power supply with reduced switching losses Switch mode power supply with reduced switching losses

2001-03-12

2002-05-14

Nguyen, Matthew (Department: 2838)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

Reexamination Certificate

active

06388287

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to a switch mode power supply having a switching transistor with reduced switching losses.
The term “switch mode power supply” is intended to cover all types of forward converters, flyback converters, half-bridge and full-bridge converters as well as step-up and step-down controllers, such as those used in power supply units, lamp ballasts, welding converters or RF converters.
For some time now, there has been an increasing trend toward system miniaturization and toward increasing the power density in components. It can be expected that this tendency in power electronics will also be continued in the future. This trend is associated with a development toward even higher switching frequencies, since this is the only way in which passive components can also be miniaturized in a corresponding manner. Furthermore, particularly in the case of industrial generators, power switching transistors in switch mode power supplies are starting to run into frequency bands that have been reserved for electron tubes for a long time. That is to say, for example, frequency bands up to what is referred to as the “ISM” frequency of 13.56 MHz.
As the switching frequency rises, the switching losses in switching transistors become increasingly important. Roughly speaking, these switching losses can be split into three groups:
(a) losses in the switching transistor, which are caused by external, generally parasitic, or non-ideal circuit elements and which could not be avoided even using “ideal” switching transistors;
(b) losses in the switching transistor resulting from an overlapping phase of the current and voltage during the actual switching process; and
(c) losses in the switching transistor resulting from the discharging of the switch's own capacitances during the switching-on process.
The switching losses mentioned in item (a) above and which can scarcely be influenced by the switching transistor itself are reduced or are entirely avoided at the moment at high switching frequencies by using special components, such as Schottky diodes, or by selecting circuit topologies without any critical commutation processes, such as resonant converters. Losses such as these also include, for example, the power loss caused by the recovery charge when the current is actively switched off by pn-diodes.
The other switching losses, as mentioned in items (b) and (c) above, can be influenced significantly by the characteristics of the switching transistor and its actuation. For example, the current-voltage overlap losses are dependent to a major extent on the duration of the switching process itself.
For illustrative purposes,
FIG. 2
a
shows the profiles of the drain current I
d
and of the drain-source voltage U
ds
of a MOSFET power switch
1
(see
FIG. 1
) as an example of a switching transistor when an inductive load
2
is being switched off. A switching process with a switching time T starts with a decrease in the control gate voltage V
gs
, as a result of which the resistance of the power switch
1
rises. However, the inductive load
2
forces the current I
d
to continue to flow, with the consequence that the drain-source voltage U
ds
also rises with the resistance, until the full load current I
d
can be carried by another circuit path, for example, a free wheeling diode
3
. This means that, throughout the entire phase in which the voltage U
ds
across the power switch
1
is rising, the full load current I
d
is still flowing via the power switch
1
. The area
6
under the product of the switch current and voltage (shown shaded) corresponds to the switching energy loss produced in the power switch
1
. Although this area can be reduced by shortening the switching time T it cannot, however, be reduced to zero in practice.
Because of the high gate charge of present-day power switches, in particular MOSFETs, high switching speeds demand very high driver currents, so that reducing the switching times T frequently runs into limits just for cost reasons.
A capacitor
4
with an external capacitance C
ext
is therefore provided in parallel with the power switch
1
to relieve the switching-off load. Consideration has also already been given to use the MOSFET's own output capacitance for reducing the switching load (see B. Carsten: “FET selection and driving considerations for zero switching loss and low EMI in HF “Thyristor dual” power converters”, Power Conversion 1996, Conference Proceedings 5/96, pages 91-102).
As can be seen from FIG.
2
(
b
), the capacitor
4
with the capacitance C
ext
slows down the rise in the voltage U
ds
. At the same time, two current paths are produced, with a current I
ch
via the channel of the MOSFET which forms the power switch, and a current via the capacitor
4
. Since the current I
ch
can now be switched off very quickly—without causing any rise in the drain-source voltage U
ds
(no “Miller” effect, see the gate-drain capacitance C
gd
in FIG.
1
), the overlapping area of the current I
ch
and the drain-source voltage U
ds
, and thus the switching-off energy loss (see the area
6
) can be reduced virtually indefinitely.
However, circuitry such as this is suitable only for circuits in which the power switch is switched on at zero voltage (zero voltage switching ZVS), since, otherwise, the losses are just moved from the switching-off to the switching-on process. Specifically, when switching on at a time when voltage is present, the energy stored in the external capacitor
4
and the energy stored in the output capacitance are converted into heat losses in the power switch
1
[see the shaded area
5
in
FIGS. 2
b
and
2
c
, which corresponds to the time integral of the product of the voltage U
ds
and the current (I
oss
)*(C
ext
), where I
oss
=output current and C
oss
=C
gd
+C
ds
]. The vast majority of standard circuits have to be switched on when the voltage is present, however. In this situation, until now, it has been possible to achieve switching-off load relief only by using complex circuitry, which in general, also produces losses for the power switch or switching transistor.
No satisfactory solution has yet been found to avoid the above switching losses.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a switch mode power supply having a switching transistor which overcomes the above-mentioned disadvantageous of the prior art apparatus of this general type, and which, in particular, is distinguished by drastically reduced switching losses.
With the foregoing and other objects in view there is provided, in accordance with the invention, A switch mode power supply that includes a switching transistor having a load path formed by a first main connection and a second main connection. The first main connection and the second main connection are provided for receiving a voltage applied thereto. The switching transistor includes a semiconductor body with a semiconductor layer of a first conductance type forming a drift area. A load is connected in series with the load path of the switching transistor. A continuous drain region of a second conductance type is incorporated into the drift area and is connected to the first main connection. A continuous source region of the second conductance type is incorporated into the drift area and is connected to the second main connection. A reverse-biased pn-junction is produced by an interaction between the semiconductor body and the continuous drain region and between the semiconductor body and the continuous source region. The reverse-biased pn-junction has a large inner voltage-dependent surface area that is variable as a function of the voltage applied to the first main connection and the second main connection. When the voltage applied is 10 V, the switching transistor is characterized by a first product of a switch-on resistance R
on
and a gate charge Q
gtot
, the first product given by: R
on
*Q
gtot
/10 V≦2.5 ns. When the voltage applied is 400 V, the switching tra

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