Surface planarizing methods for integrated circuit devices

Details Surface planarizing methods for integrated circuit devices Surface planarizing methods for integrated circuit devices

1991-02-05

1994-03-01

Dang, Thi

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156656, 156657, 437190, 437195, 437228, H01L 2100

Patent

active

052903990

ABSTRACT:
An improved method of planarizing a side surface of a partially completed integrated circuit device comprises, in sequence, the steps of depositing on the side surface a spin-on glass coating; partially curing the coating; back etching the coating to remove portions thereof which overlie insulation-encapsulated electrically conductive portions of the device; and then subjecting the remaining coating portions, which are disposed within and level off previously depressed portions of the side surface, to an oxygen plasma final curing process, preferably utilizing a downstream stripper type oxygen plasma generator. By performing the back etching step prior to the oxygen plasma curing step, undesirable cracking of the remaining coating portions is advantageously avoided.

REFERENCES:
patent: 4614021 (1986-09-01), Hulseweh
patent: 4676867 (1987-06-01), Elkins et al.
patent: 4721548 (1988-01-01), Morimoto
patent: 4746629 (1988-05-01), Hanagasaki
patent: 4826709 (1989-05-01), Ryan et al.
patent: 4894351 (1990-01-01), Batty
patent: 4948459 (1990-08-01), van Laarhoven et al.
patent: 4962063 (1990-10-01), Maydan et al.
patent: 4983546 (1991-01-01), Hyun et al.
patent: 4986878 (1991-01-01), Malazgirt et al.
patent: 5003062 (1991-03-01), Yen
patent: 5059448 (1991-10-01), Chandra et al.
A Planarization Process for Double Metal CMOS Using Spin-On-Glass as a Sacrificial Layer, Elkins Reinhardt and Tang, 1986, V-Mic Conf.
"Interlevel Dielectric Planarization with Spin-On Glass Films," Vines and Gupta, 1986, V-Mic Conf.
"Spin-On-Glass Dielectric Planarization for Double Metal CMOS Technology," Chu, Multani, Mittal, Orton and Jecmen, 1986, V-Mic Conf.
"Understanding of Spin-On-Glass (SOG) Properties from Their Molecular Structure," Chiang and Fraser, 1989, V Mic Conf.
"Characterization of Spin-On-Glass Using Fourier Transform Infrared Spectroscopy," Woo, Cain and Lee, Electrochem. Soc., vol. 137, No. 1, Jan. 1990.
"O.sub.2 Plasma-Converted Spin-On-Glass for Planarization," Butherus, Hou, Mogab and Schonhorn; J. Vac. Sci. Technol. B3(5), Sep./Oct. 1985.
"Advantages of Using Spin-On-Glass Layer in Interconnection Dielectric Planarization", Schiltz; Microelectronic Engineering 5 (1986) 413-421.
"Application of Surface Reformed Thick Spin-On-Glass to MOS Device Planarization", Ito and Homma; Electrochem Soc., vol. 137, No. 4, Apr. 1990.

Affiliated with

Also associated with

Rating

Surface planarizing methods for integrated circuit devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Surface planarizing methods for integrated circuit devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Surface planarizing methods for integrated circuit devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-573928