Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2006-06-06
2006-06-06
Whitehead, Jr., Carl (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
Reexamination Certificate
active
07057273
ABSTRACT:
Space-efficient packaging of microelectronic devices permits greater functionality per unit PC board surface area. In certain embodiments, packages having leads of a reverse gull wing shape reduce peripheral footprint area occupied by the leads, thereby permitting maximum space in the package footprint to be allocated to the package body and to the enclosed die. Embodiments of packages in accordance with the present invention may also reduce the package vertical profile by featuring recesses for receiving lead feet ends, thereby reducing clearance between the package bottom and the PC board. Providing a linear lead foot underlying the package and slightly inclined relative to the PC board further reduces vertical package profile by eliminating additional clearance associated with radiuses of curvature of J-shaped leads.
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JEDEC Solid State Product Outline, Low Profile Small Outline J-Lead Package (LSOJ), PRSO-J/LSOJ, Issue B, Jun. 1999, MO-199, pp. 1-5.
JEDEC Solid State Product Outlines, “Small Outline J-Lead”(SOJ) .300 Body Family (MS-013 Body), Issue A, Jun., 1988, MO-088, AA-AF.
JEDEC Solid State Product Outline, Low Profile Small Outline J-Lead Package (LSOJ), PRSO-J/LSOJ, Issue B, Jun., 1999, MO-199, pp. 1-5.
JEDEC Solid State Product Outlines, “Plastic Small Outline (SOJ) Package Family with .330 Inch Body Width”, Issue B, May, 1992, MO-121, pp. 1-2.
Chia Anthony
Harnden James
Weibing Chu
Williams Richard K.
Dolan Jennifer M.
GEM Services, Inc.
Jr. Carl Whitehead
Townsend and Townsend / and Crew LLP
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