Suppression of hillock formation in thin aluminum films

Details Suppression of hillock formation in thin aluminum films Suppression of hillock formation in thin aluminum films

2000-08-31

2002-02-19

Picardat, Kevin M. (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S597000, C438S611000, C438S619000

Reexamination Certificate

active

06348403

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to electrical interconnection lines which suppress hillock formation in thin aluminum metal layers for use in semiconductor devices including field emission displays, and more particularly to the use of a multilayer structure which includes aluminum titanium nitride layers.
Integrated circuits are manufactured by an elaborate process in which a variety of different electronic devices are integrally formed on a small silicon wafer. Conventional electronic devices include capacitors, resistors, transistors, diodes, and the like. In advanced manufacturing of integrated circuits, hundreds of thousands of electronic devices are formed on a single wafer.
One of the steps in the manufacture of integrated circuits is to form metal interconnect lines between the discrete electronic devices on the integrated circuit. The metal interconnect lines allow for an electrical current to be delivered to and from the electronic devices so that the integrated circuit can perform its intended function.
The metal interconnect lines generally comprise narrow bands of aluminum. Aluminum is typically used because it has a relatively low resistivity, good current-carrying density, superior adhesion to silicon dioxide, and is available in high purity. Each of these properties is desirable in interconnect lines since they result in a faster and more efficient electronic circuit.
The computer industry is constantly under market demand to increase the speed at which integrated circuits operate and to decrease the size of integrated circuits. To accomplish this task, the electronic devices on a silicon wafer are continually being increased in number and decreased in dimension. In turn, the dimension of the metal interconnect lines must also be decreased. This process is known as miniaturization.
Metal interconnect lines are now believed to be one of the limiting factors in the miniaturization of integrated circuits. It has been found, however, that by using more than one level in the interconnect, the average interconnect link is reduced and with it the space required on the integrated circuit. Thus, integrated circuits can further be reduced in size. These multi-level metals are referred to as metal interconnect stacks, named for the multiple layers of different metals which are stacked on top of each other. As heat treatments following metal deposition steps get longer and higher temperatures occur, a phenomenon referred to as “void formation” has been found to occur more frequently. In general, void formation is a process in which minute voids are formed within the metal interconnect line which voids coalesce at flux divergence sites, such as grain boundary triple points, of the metal interconnect line. As a result of the coalescing of the voids, the aluminum in the line begins to narrow at a specific location. If the aluminum gets sufficiently narrow, the metal interconnect line can void out so as to cause a gap in the line. Such a gap results in an open circuit condition and prevents the integrated circuit from operating in a proper manner.
Void formation is generally caused by either electro migration or stress migration. Electro migration occurs as an electrical current flows through the aluminum portion of an interconnect line. When a voltage is applied across the aluminum, electrons begin to flow through the aluminum. These electrons impart energy to the aluminum atoms sufficient to eject aluminum atoms from their lattice sites. As the aluminum atoms become mobile, they leave behind vacancies. In turn, the vacancies are also mobile, because they can be filled by other aluminum atoms which then open new vacancies. In the phenomenon of electro migration, the vacancies formed throughout the aluminum line tend to coalesce at flux divergence sites such as gain boundary triple points of the metal line, thereby forming voids that narrow the metal interconnect line as discussed above. Once the metal interconnect line is narrowed, the current density passing through that portion of the line is increased. As a result, the increased current density accelerates the process of electro migration, thereby continually narrowing the line until a gap forms and the line fails.
It is also thought that void formation occurs as a result of stress migration inherent in aluminum line deposition. The deposition of the aluminum in the metal interconnect lines is usually conducted at an elevated temperature. As the aluminum in the line cools, the aluminum begins to contract. The insulation layer positioned under the aluminum layer, typically silicon dioxide, also contracts. Because the aluminum and the silicon dioxide have greatly different coefficients of thermal expansion and contraction, however, the two materials contract at different rates. This contraction causes an internal stress within the aluminum portions of the metal interconnect lines.
A related reliability problem with aluminum interconnect lines is the formation of hillocks. Hillocks are spike-like projections which erupt in response to a state of compressive stress in thin metal films such as aluminum films and consequently protrude from a film's surface. Hillocks are especially a problem in thin aluminum films because the coefficient of thermal expansion of aluminum is almost ten times as large as that of silicon. When the much more massive silicon wafer is heated, for example during an annealing step, large compressive stresses are induced. Further, the low melting point of aluminum and consequent high rate of vacancy diffusion in aluminum films encourages hillock growth. Hillocks can cause both interlevel as well as intralevel interconnect shorting when they penetrate the dielectric layer that separates neighboring metal lines.
Previously, attempts have been made to suppress hillock formation either by anodizing the aluminum line or by alloying the aluminum with other metals such as tantalum (Ta), titanium (Ti), neodymium (Nd), yttrium (Y), gadolinium (Gd), nickel (Ni), iron (Fe), cobalt (Co), and the like. However, anodization adds a step and complicates the manufacturing process. Further, alloys of aluminum still present both thermal and mechanical stability problems besides contributing to higher resistivity values.
Thin aluminum films also find use as the cathode in thin film transistor (TFT) devices such as, for example, flat panel displays, liquid crystal displays, and field emission devices. The manufacture of TFT devices presents manufacturing challenges as the formation of the components of such devices is both complicated and costly. Again, as thin aluminum films must be deposited onto glass or other dielectric substrates, the same mismatches in coefficients of thermal expansion as well as the thermal and mechanical instability of thin aluminum films present problems, including hillock formation problems.
Accordingly, there still exists a need in this art for a structure and fabrication process which achieves suppression of hillock formation while improving reliability in thin aluminum metal films.
SUMMARY OF THE INVENTION
The present invention meets that need by providing a multilayer structure which suppresses hillock formation in thin aluminum films by sandwiching the aluminum film between thin layers of aluminum titanium nitride. In accordance with one aspect of the invention, a process for forming an electrical interconnect line in a semiconductor device is provided and includes the steps of providing a substrate, depositing a first layer of Al
x
Ti
y
N
z
thereon, wherein x, y, and z are numbers >0 and <1, depositing a layer of aluminum metal onto the first layer of Al
x
Ti
y
N
z
, and depositing a second layer of Al
x
Ti
y
N
z
, where x, y, and z may be the same as or different from the first layer onto the aluminum metal layer. The first aluminum titanium nitride layer acts as a compatibilizing layer to provide a better match between the coefficients of thermal expansion of the substrate and aluminum metal layer. The second aluminum titanium nitride layer acts as a cap

Affiliated with

Also associated with

Rating

Suppression of hillock formation in thin aluminum films does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Suppression of hillock formation in thin aluminum films, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Suppression of hillock formation in thin aluminum films will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2979307