Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
Reexamination Certificate
2011-04-12
2011-04-12
Huisman, David J (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Scoreboarding, reservation station, or aliasing
C712S229000, C712S239000
Reexamination Certificate
active
07925868
ABSTRACT:
Within a data processing system including a register renaming mechanism, register renaming for some conditional instructions which are predicted as not-executed is suppressed. The conditional instructions which are subject to such suppression of renaming may not be all conditional instructions, but may be those which are known to consume a particularly large number of physical registers if they are subject to renaming A conditional load multiple instruction in which multiple registers are loaded with new data values taken from memory in response to a single instruction is an example where the present technique may be used, particularly when one of the registers loaded is the program counter and accordingly the instruction is a conditional branch.
REFERENCES:
patent: 5784589 (1998-07-01), Bluhm
patent: 6170052 (2001-01-01), Morrison
patent: 2005/0120191 (2005-06-01), Akkary et al.
ARM Limited, “ARM Architecture Reference Manual”, 2005, pp. A4-36,37.
Airaud Cédric Denis Robert
Begon Florent
Lataille Norbert Bernard Eugéne
Vincent Mélanie
ARM Limited
Huisman David J
Nixon & Vanderhye P.C.
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