Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-10-17
2006-10-17
Moazzami, Nasser (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S202000
Reexamination Certificate
active
07124253
ABSTRACT:
One embodiment of the present invention provides a system that supports directory-based cache coherence in an object-addressed memory hierarchy in a computer system. During operation, the system receives a cache-coherence transaction for a cache line. If the cache line is an object-addressed cache line, the system uses a corresponding object identifier and offset to look up directory information specifying where copies of the object-addressed cache line are located in the caches in the computer system. Next, the system uses the directory information to perform the cache-coherence transaction.
REFERENCES:
patent: 6154811 (2000-11-01), Srbljic et al.
patent: 6654866 (2003-11-01), Hagersten et al.
patent: 6859868 (2005-02-01), Wright et al.
Moazzami Nasser
Park Vaughan & Fleming LLP
Sun Microsystems Inc.
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