Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
1995-06-05
2003-02-25
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
Reexamination Certificate
active
06525336
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a superfine electronic device for realizing an ultrahigh density and ultrahigh speed logic and memory circuit, and more in detail, to an atomic fine line or quantum fine line having a size at an atomic level. The invention also relates to a method for making such a device by combining a plurality of atoms arranged on one or a plurality of straight lines, in a ring-shape, on a curve or in a spherical shape in good order or at random, or further by combining atoms in an optimum manner.
BACKGROUND OF THE INVENTION
In a prior art semiconductor electronic device having a structure consisting of switching devices such as transistors, etc. formed in a semiconductor substrate and wiring electrically connecting these devices with each other, outputs of the switching devices are inputted generally to devices in succeeding stages through the wiring.
For this reason, the switching time of the switching devices is influenced often more strongly by time constants determined by resistance and capacitance of the wiring than by characteristics of the devices themselves. That is, in a prior art semiconductor switching device, since the switching time of the whole system was determined by the time constant of the wiring connecting transistors acting as switching elements with each other rather than by the switching time of the transistors, this gave rise to a physical speed limit.
However, this problem has not been studied seriously, because it was possible to improve the property of the system by decreasing the size of the devices according to the so-called scaling rule, by which the size of the devices is decreased isotropically.
However, in prior art electronics, since the scale of the wiring is limited by the minimum dimension scale of semiconductor devices, it is 0.3 &mgr;m at the present technical state and even if technical development will be advanced in the future, fine dimensions up to about 0.1 &mgr;m at the best will be the limit of the decrease in the scale. On the other hand, since if the thickness of an insulating film is greater than that determined from the point of view of design balance, this can cause defects such as disconnection, etc., there is naturally a limit therein.
In order to overcome this difficulty, as seen e.g. in D. M. Eigler & E. K. Schweizer: Nature 344, 524 (1990), etc., there are have been trials to realize an atomic electronic device by manipulating material at an atomic level by a scanning tunneling microscope (STM).
For these trials, usually an analogy is traced with bulk. In order to construct a superfine line made of a metal conductor by manipulating material at an atomic level, it is usual to try to arrange single metal atoms such as Al, Ag and Au one-dimensionally with a width of at most several atoms by using peripheral techniques of STM.
Further, similarly to the case for electronics in bulk, it was usual to try to construct a diode or a transistor while controlling the conductivity type of a semiconductor so that it was of p type or n type by introducing an extremely small quantity of impurity of about 1 ppm into it.
SUMMARY OF THE INVENTION
When it was attempted to construct semiconductor elements such as diodes, transistors, etc. in the form of an integrated circuit, a limit occurred in its integration density. This was due to the fact that a method was adopted for forming a pn junction, by which impurities were diffused or impurity ions were implanted.
That is, if the size of elements is decreased and the integration density is raised, this gives rise to a problem of the statistical fluctuation limit due to the fact that the number of impurity atoms per unit volume decreases or a problem of size limit produced by the width of a space charge layer.
For this reason, the limit of decrease in the size of semiconductor elements according to prior art techniques is 0.1 &mgr;m at minimum and further decrease in the size of elements or increase in the integration density is substantially impossible.
One of the objects of the present invention is to provide integrated elements with an ultrahigh density exceeding such a limit of the integration density.
The above object can be achieved by constructing pn junction elements using atomic fine lines with a size of atomic level. The atomic fine lines have a structure in which a plurality of atoms are arranged on one or a plurality of straight lines, in a ring shape, in a cubic shape, or on curves. A pn junction using atomic fine lines consists of atomic fine lines and respective elements supplying electrons and holes thereto. The respective elements supplying electrons and holes are constructed by doping atoms having a property of supplying electrons and doping atoms having a property of attracting electrons, respectively. The doping concentration of electrons or holes is regulated by varying the distance between the atomic fine lines and the doping atoms or the density of the doping atoms.
Such a junction between an electron conduction region and a hole conduction region at an atomic level will be explained, and will be referred to herein as an atomic fine line pn junction.
Further, the present invention proposes to obtain stable atomic fine lines having a high conductivity and atomic fine lines whose conductivity type is controlled so as to be of p type or n type by combining specified atomic species.
The present invention is characterized in that, in order to achieve a device at an atomic level, no analogy is traced with bulk, but it is found and utilized that combinations of atomic species, which are thought to be rather unusable in a bulk for their stability, can act usefully.
Therefore, in the decrease in the size of the present device structure and the increase in the speed thereof, there is a physical and technical limit, and in order to realize further high speed switching, a completely new device structure and superfine wiring structure is required.
REFERENCES:
patent: A-427443 (1990-10-01), None
Nature, vol. 344, No. 6266, Apr. 5, 1990, Eigler et al. “Positioning Single Atoms with a Scanning Tunnelling Microscope”, pp. 524-526.
Elektronik, vol. 40, No. 21, Oct. 15, 1991, “Einzelnes Atom als elektrischer Schalter”.
Ichiguchi Tsuneo
Kondo Seiichi
Kure Tokuo
Murayama Yoshimasa
Okazaki Shinji
Antonelli Terry Stout & Kraus LLP
Hitachi , Ltd.
Jackson Jerome
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