Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Tunneling through region of reduced conductivity
Patent
1992-12-29
1994-07-05
Ngo, Ngan
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Tunneling through region of reduced conductivity
257 35, 257288, 257289, 257661, H01L 3922, H01L 2712, H01L 4500
Patent
active
053269888
ABSTRACT:
A superconducting device including first and second trenches formed on a principal surface of a semiconductor substrate, separated from each other, and first and second superconductor electrodes filled in the first and second trenches and planarized to have a surface coplanar with the principal surface of the semiconductor substrate. The first and second superconductor electrodes form a separation zone which is defined by opposing sides of the first and second superconductor electrodes. An insulating layer is formed to cover a portion of the first superconductor electrode, the separation zone and a portion of the second superconductor electrode, and a gate electrode is formed on the insulating layer so as to be positioned above at least the separation zone. The above mentioned superconducting device can be formed by forming first and second trenches on a principal surface of a semiconductor substrate separate from each other, and depositing a superconductor layer so as to cover a whole of the principal surface of the semiconductor substrate. A resin layer is deposited on the whole of the principal surface of the semiconductor substrate, and etch-back is performed to completely remove the deposited resin layer and also to remove the deposited superconductor layer from a surface excluding the first and second trenches, so that the superconductor layer remaining in the first and second trenches respectively form first and second superconductor electrodes planarized to have a surface coplanar with the principal surface of the semiconductor substrate. An insulating layer and a gate electrode are formed to cover at least a separation zone between the first and second trenches.
REFERENCES:
Fang et al "Superconducting FET" IBM Tech Discl. Bull. vol. 19 No. 4, pp. 1461-1462. Sep. 1976.
Ivanov et al "Three Terminal Josephson Junction with a Semiconductor Accumulation Layer" Jap. J. Appl. Phys vol. 26 Suppl 26-3 (1987).
Nishino et al. "Study of Si-Coupled Superconducting Field-Effect Transistor by Tunneling Spectroscopy" IEEE vol. 8 (1988) pp. 286-289.
Sugahara et al. "Experiment of FET with a Channel Made of NBN Granular Thin Film" IEEE Trans. on Magnetics vol. 25 No. 2. Mar. 1989.
"0.1-.mu.m Gate-Length Superconducting FET", Nishino, et al., IEEE Electron Device Letters, vol. 10, No. 2, Feb. 1989, pp. 61-63.
NEC Corporation
Ngo Ngan
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