Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Tunneling through region of reduced conductivity
Reexamination Certificate
2005-06-28
2005-06-28
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Tunneling through region of reduced conductivity
C257S031000, C257S033000, C505S191000, C505S233000
Reexamination Certificate
active
06911665
ABSTRACT:
A superconducting integrated circuit includes a substrate, a multilayer structure formed on the substrate and composed of a lower superconducting electrode, a tunnel barrier and an upper superconducting electrode sequentially joined together upward in the order mentioned, and an insulating layer perforated to form via holes to get electrical contacts with the lower and upper electrodes. The insulating layer is formed of a high-resolution, photosensitive, solvent-soluble, organic insulating material. The superconducting integrated circuit is produced by a method that includes the steps of depositing the multiplayer on the substrate, applying the insulating material to the front surface of the substrate inclusive of the multiplayer, forming the via holes in the insulating material by the lithographic technique at the prospective positions to get electrical contacts with the upper and lower electrodes, and laying wirings for connecting the upper and lower electrodes through the via holes.
REFERENCES:
patent: 4942142 (1990-07-01), Itozaki et al.
patent: 5068694 (1991-11-01), Ohara
patent: 6441394 (2002-08-01), Kasai et al.
Murduck et al, IEEE Transactions on Applied Superconductivity, vol. 9, No. 2 Jun. 1999, pp 3354-3357, “HTS . . . smoothness”.
Aoyagi Masahiro
Itatani Hiroshi
Kikuchi Katsuya
Nakagawa Hiroshi
Segawa Sigemasa
Jackson Jerome
National Institute of Advanced Industrial Science and Technology
PI R&D Co., Ltd.
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