Superconducting circuit having superconductive circuit...

Electronic digital logic circuitry – Superconductor – Tunneling device

Reexamination Certificate

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C326S006000, C326S007000, C365S160000, C365S162000

Reexamination Certificate

active

06242939

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to a superconducting circuit and, more particularly, to a superconducting circuit using a Josephson junction as a circuit device.
DESCRIPTION OF THE RELATED ART
An integrated circuit using the Josephson junctions is hereinbelow referred to as “superconducting integrated circuit”. The superconducting integrated circuits are broken down into two categories. The first category is a voltage-type logic device, and uses the non-linearity of the voltage-to-current characteristics of the Josephson junction. The logic gates categorized in the voltage-type logic device achieves the logic functions already known in the semiconductor logic gates. Another category uses the non-linearlity of the current phase characteristics of the Josephson junction, and is called as “fluxoid type logic device”.
A superconducting integrated circuit of the voltage-type logic device outputs a constant voltage for a constant period. The output potential level is changed between state “0” and state “1”, and the state “0” and state “1” are usually corresponding to zero volt and predetermined volts. The superconducting integrated circuit is responsive to a potential so as to achieve a logic function, and the potential is hereinbelow referred to as “operating signal”. The superconducting integrated circuit of the voltage-type logic device has a Josephson junction with the McCumber coefficient greater than 1, and the Josephson junction is in the under-damping state. The McCumber coefficient is expressed as 2&pgr;I
0
CR
D
2
/&PHgr;
0
where I
0
is the critical current value of the Josephson junction, C is capacitance, R
D
is resistance and &PHgr;
0
is the single flux quantum (see “Ultra High-Speed Josephson Device”, page 38, published by Baihukan). The superconducting integrated circuit is used under the condition that the Josephson junction is biased with alternating current. When the Josephson junction in the voltage-type logic device is switched to the voltage state, the Josephson junction remains there. In order to return to the initial state, i.e., the superconductive state, it is necessary to change the bias current to zero. For this reason, the Josephson junction of the voltage-type logic device is called as “latching device”.
On the other hand, a superconducting integrated circuit of the fluxoid type logic device outputs a SFQ (Single Flux Quantum) pulse, and achieves a logic function through propagation of the single flux quantum depending upon the quantum state. The operating signal applied to the fluxoid type logic device is called as “SFQ pulse signal”. The superconducting integrated circuit has a Josephson junction with the McCumber coefficient equal to or less than 1, and the Josephson junction is in the over-damping state. The superconducting integrated circuit is used under the condition that the Josephson junction is biased with direct current. The fluxoid-type logic device achieves a logic function through propagation/storage of the SFQ pulse. The basic gate of the fluxoid-type logic device is operable as a kind of memory. For this reason, it is easy to form a superconducting integrated circuit in the pipeline architecture. Although plural flux quanta are used in a superconducting integrated circuit, the single flux quantum is a majority in the superconducting integrated circuits. For this reason, the fluxoid-type logic device is sometimes called as “SFQ device”.
Various applications have been proposed. One of the applications is a superconducting random access memory. A typical example of the superconducting random access memory of the voltage-type logic device is disclosed in “A 380 ps, 9.5 mW Josephson 4-Kbit, RAM Operated at High Bit Yield”, IEEE Trans. on Applied Superconductivity, vol. 5, No. 2, pages 2447-2452, June 1995. An example of the superconducting memory of the fluxoid-type logic device has one dimensional arrangement, because a two-dimensional array is hardly achieved. A superconducting shift-register is disclosed in “RSFQ 1024-bit Shift Register for Acquisition Memory”, IEEE Trans. On Applied Superconductivity, vol. 3, No. 4, pages 3102-3133, December 1993. However, any superconducting random access memory of the fluxoid-type logic device has not been developed, yet.
Another application is a superconducting NOR circuit. As well known to a person skilled in the art, the NOR logic is achieved by the combination of the OR logic and the NOT logic. For this reason, the superconducting NOR circuit is implemented by the combination of a superconducting OR circuit and a superconducting NOT circuit.
typical example of the superconducting NOR circuit is shown in FIG.
1
. The prior art superconducting NOR circuit comprises a Josephson magnetically coupled multi-input OR circuit OR and a superconducting NOT circuit NOT, which is a kind of superconducting quantum interference device. In
FIG. 1
, J
1
and J
2
are indicative of Josephson junctions, and bias feed resistors are labeled with Rb
1
and Rb
2
. RL
1
, RL
2
and RL
3
designate load resistors.
The Josephson magnetically coupled multi-input OR circuit and the superconducting NOT circuit are categorized in the voltage-type logic device. The Josephson magnetically coupled multi-input OR circuit is disclosed in Japanese Patent Application No. 5-123676, and the superconducting quantum A interference device is usually abbreviated as “SQUID”. The superconducting OR circuit OR is implemented by a series combination of magnetically coupled SQUIDs. Accordingly, the even if the number of input signals is increased, the increase of the input signals only results in the number of the magnetically coupled SQUIDs, and the bias current is not increased. Another attractive feature of the prior art superconducting NOR circuit is an integration of plural superconducting NOR circuits. The input signals are magnetically coupled, and, accordingly, the input signal lines are directly connected. As a result, plural superconducting NOR circuits are driven without increase of the input signal current.
A superconducting logic circuit of the fluxoid type logic device is operative under the direct current bias, and achieves a high-speed logic function. A superconducting NOR circuit of the fluxoid type logic device is also realized by using a single flux quantum OR circuit and a single flux quantum NOT circuit (see IEEE Trans. on Applied Superconductivity, vol. 3, No. 1, pages 2566-2577, March 1993).
FIG. 2
illustrates the prior art superconducting NOR circuit of the fluxoid type logic device. The prior art superconducting NOR circuit comprises a two-input single flux quantum superconducting OR circuit OR and a single flux quantum superconducting NOT circuit NOT. J
1
to J
4
and J
11
to J
16
designate Josephson junctions. Shunt resistors are labeled with r
1
to r
4
and r
11
to r
16
. Rd
1
and Rd
2
are indicative of damping resistors, and Rb
11
and Rb
12
designate bias feed resistors. L
2
and L
11
to L
15
are indicative of inductors. Direct current bias is applied through the bias feed resistors Rb
11
and Rb
2
, and any alternating current is not required for the prior art superconducting NOR circuit.
Yet another application is a superconducting signal converter. The superconducting signal converter is incorporated in a superconducting integrated circuit, which includes both of the fluxoid-type logic device and the voltage-type logic device or both of the fluxoid-type logic device and a semiconductor circuit. The superconducting signal converter converts an output signal of the fluxoid-type logic device to an input signal of the voltage-type logic device, by way of example. In other words, the superconducting signal converter converts the SFQ pulse signal to the level signal.
A HUFFLE gate is biased with direct current as similar to the fluxoid type logic device, and outputs a level signal. Using the HUFFLE gate, the prior art superconducting signal converter is fabricated as disclosed in IEEE Trans. on Mag., vol. 1, MAG-15, No. 1, pages 408-411, 1979.
FIG. 3
illustrates a typical example of the pr

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