Super lattice modification of overlying transistor

Details Super lattice modification of overlying transistor Super lattice modification of overlying transistor

2006-06-08

2008-11-25

Warren, Matthew E (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

With lattice constant mismatch

C257S012000, C257S015000, C257S022000, C257S183100, C257S192000, C257SE29072, C257SE29081

Reexamination Certificate

active

07456442

ABSTRACT:
The invention provides a device having a substrate, a buffer region positioned upon the substrate, wherein the buffer region has an upper buffer region and a lower buffer region, a heterojunction region positioned upon the buffer region, and a superlattice positioned between the lower buffer region and the upper buffer region, wherein the device is configured to function as a heterojunction field effect transistor.

REFERENCES:
patent: 6462361 (2002-10-01), Udagawa et al.
patent: 2003/0178633 (2003-09-01), Flynn et al.

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