Substrate voltage generating circuit of semiconductor memory dev

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

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327 78, 327535, 327525, G05F 110

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active

058381899

ABSTRACT:
A substrate voltage generating circuitry for a dynamic random access memory (DRAM) generates the substrate voltage using an intermittently enabled charge pump. The value to which the substrate voltage is regulated is adjusted responsive to the static refresh and dynamic refresh characteristics of the memory cells. The adjustment is made in the portion of the substrate voltage generating circuit used for sensing the substrate potential, using fusible links that can be interrupted or cut with a laser beam. Novel circuitry for sensing the substrate potential, which does not load the substrate so as to dissipate charge placed thereon by the charge pump, is used in preferred substrate voltage generating circuitry.

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patent: 5426334 (1995-06-01), Skovmand
patent: 5448199 (1995-09-01), Park
patent: 5473277 (1995-12-01), Furumochi
patent: 5554953 (1996-09-01), Shibayama et al.
patent: 5572147 (1996-11-01), Huang et al.
"A Tunable CMOS-DRAM Voltage Limiter With Stabilized Feedback Amplifier," by M. Horiguchi, M. Aoki, J. Etoh, H. Tanaka, S. Ikenaga, K. Itoh, K. Kajigaya, H. Kotani, K. Ohshima and T. Matsumoto; 1990 Symposium on VLSI Circuits, pp. 75-76.

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