Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks
Reexamination Certificate
2007-03-19
2009-10-13
Chambliss, Alonzo (Department: 2892)
Active solid-state devices (e.g., transistors, solid-state diode
Alignment marks
C438S401000, C438S462000, C257SE23179
Reexamination Certificate
active
07602072
ABSTRACT:
The alignment marks formed in a scribe line of a semiconductor substrate include at least one main mark, a first sub-mark and second sub-marks. The first sub-mark is formed at a central portion of the main mark. The second sub-marks are disposed symmetrically with respect to the first sub-mark and are used for detecting asymmetry of the main mark by measuring distances between respective side edges of the main mark and the first sub-mark, and by measuring respective side edges between the main mark and each of the second sub-marks. Alternatively, the alignment marks include main outer and inner marks and a sub-mark disposed in between the main outer and inner marks. In this case, the sub-mark is used for detecting asymmetry of the main mark by measuring distances between respective side edges of the main outer mark and the sub-mark, and by measuring respective side edges between the main inner mark and the sub-mark. Thus, accurate alignment information can be obtained regardless of whether the main mark was inadvertently formed as asymmetrical.
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Kim Joon-Sung
You Ji-Yong
Chambliss Alonzo
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
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