Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2007-05-22
2007-05-22
Baumeister, B. William (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S780000, C257SE21503
Reexamination Certificate
active
10950400
ABSTRACT:
A substrate for mounting a semiconductor chip is formed as a multilayer substrate by alternately laminating insulation layers and wiring layers. Wires of the wiring layers are electrically connected through a via-hole for interlayer continuity. A through-hole provided through the insulation layer of the outermost surface layer is formed. A bump is inserted in the through-hole to a bump allocating position of the semiconductor chip to be mounted in the insulation layer of the outermost surface layer. A portion of the wire in the wiring layer of the outermost surface layer is projected to the internal side of through-hole at the aperture of the through-hole.
REFERENCES:
patent: 5980270 (1999-11-01), Fjelstad et al.
patent: 6285562 (2001-09-01), Zakel et al.
patent: 6492737 (2002-12-01), Imasu et al.
patent: 6759268 (2004-07-01), Akagawa
patent: A-2000-91382 (2000-03-01), None
patent: A-2003-179098 (2003-06-01), None
Baumeister B. William
Denso Corporation
Farahani Dana
Posz Law Group , PLC
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