Substrate for mounting a semiconductor

Details Substrate for mounting a semiconductor Substrate for mounting a semiconductor

2007-11-13

2007-11-13

Williams, Alexander Oscar (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257SE23070, C257SE31131, C257SE21504, C257SE21518, C257SE21525, C257S782000, C257S783000, C257S786000, C257S676000, C257S784000, C257S668000, C438S015000, C438S017000, C324S691000, C324S763010, C324S765010

Reexamination Certificate

active

10473454

ABSTRACT:
A substrate (1) is formed from a non-electrically conducting material and is for mounting a semiconductor chip (10). The substrate has a semiconductor chip mounting portion (6). A number of first electrically conducting contact portions (5) are formed on the surface of the material and associated with the mounting portion (6). A second electrically conducting contact portion (3) is formed on the surface of the material, and the second electrically conducting contact portion (3) is adapted to be coupled to testing equipment. A number of electrically conducting paths (4) are formed on the surface of the material. The conducting paths (4) electrically connect the second electrically conducting contact portion (3) to a minority of the first electrically conducting contact portions (5).

REFERENCES:
patent: 4859189 (1989-08-01), Petersen et al.
patent: 4967142 (1990-10-01), Sauerwald et al.
patent: 5138436 (1992-08-01), Koepf
patent: 6184576 (2001-02-01), Jones et al.
patent: 6373348 (2002-04-01), Hagerup
patent: 6853202 (2005-02-01), Chang et al.
patent: 4133341 (1992-05-01), None
patent: 7211814 (1995-08-01), None
patent: 10056108 (1998-02-01), None
patent: 10214849 (1998-08-01), None

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