Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond
Reexamination Certificate
2000-06-29
2001-10-30
Flynn, Nathan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Die bond
C257S664000, C257S699000, C257S703000
Reexamination Certificate
active
06310401
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the improvement of metallic-ceramic substrates for high-voltage modules.
Power semiconductor components, particularly IGBTs, are fixed on a metallic-ceramic substrate.
FIG. 2
herein shows a typical unit construction in cross section. The utilized substrate comprises a ceramic layer
1
that normally is comprised of Al
2
O
3
or AlN, for example. Metal layers that are formed by a copper metallization, for example, are situated on both main sides
21
,
22
of this ceramic layer. Given the installation, a bottom metal layer
3
is attached to a bottom plate
5
by means of soldered joint
4
, wherein the bottom plate
5
can be made of copper. The power semiconductor components
15
, such as an IGBT or a diode, are attached to an upper metal layer
2
by means of a further soldered joint
12
. The upper terminal contacts of the power semiconductor components are connected to a separate portion of the upper metal layer
2
by means of a bond wire
16
, for example. Electrical inlets
13
that are connected to external contacts for tapping the operating voltage are attached to the upper metal layer
2
by means of further soldered joints
12
. The arrangement is situated in a housing
7
that is preferably made of plastic and filled with a casting compound
6
. The casting compound
6
serves to electrically insulate the arrangement from the environment.
FIG. 3
herein shows the typical course of the equipotential surfaces on the basis of the cross sections that are given in the area of the edge of the substrate due to the equipotential lines
11
. The lateral edges of the metal layers
2
,
3
do not coincide with the lateral edge
23
of the ceramic layer
1
. Given a typical arrangement, the lateral edge of the upper metal layer
2
is more remote from the lateral edge
23
than the lateral edge of the lower metal layer
3
. Therefore, the substrate is fashioned similar to a base. The equipotential lines
11
come out of the first main side
21
of the ceramic layer
1
, which is provided with the upper metal layer
2
(as shown in FIG.
3
). The electrical field intensity is especially high in the edge region of the metal layers
2
,
3
as evidenced by the gradient of the equipotential surface lines, and can reach extreme peak values. These high occurring field intensities at the edge regions of the metal layers are the cause for a high partial discharge of the unit, which, as has been experimentally proven, suddenly begins when a threshold value of the operating voltage has been exceeded. The unit, particularly the casting compound
6
, is permanently damaged as a result of such a high partial discharge. Therefore, the high-voltage resistance of the unit is limited.
Present further developments of the IGBT units are directed toward high operating voltages, as they are known from thyristors. The voltages between the casting compound and the electrically active part of the unit assume values above 10 kV, so that more stringent requirements must be met with respect to the insulating power of the units and their longevity.
SUMMARY OF THE INVENTION
The present invention is based on the need for a substrate for high-voltage units that is also appropriate for operating voltages significantly higher than 3 kV.
This need is met by the present invention that includes a substrate for high voltage units including a ceramic layer having a first main side and a second main side that is opposite to the first main side. An upper metal layer is disposed on the first main side and a lower metal layer is disposed on the second main side. A high-impedance layer is also included having at least a portion disposed adjacent to the upper metal layer at the first main side of the ceramic layer. The high-impedance layer also has either at least a portion electrically connected to an electrical conductor that is, in turn, electrically connected to the lower metal layer or another portion disposed adjacent to the lower metal layer. The high-impedance layer effects a degree of electrical conduction between the upper metal layer and the lower metal layer.
According to another aspect of the present invention, a substrate for high voltage modules includes a ceramic layer having first and second main sides, an upper metal layer disposed on the first main side and a lower metal layer disposed on the second main side and electrical conductors disposed at the first main side at edges of the upper metal layer. The electrical conductors are formed such that they are increasingly distanced from the ceramic layer with an increasing distance along a length of the electrical conductors away from the upper metal layer.
According to yet another aspect of the invention, a substrate has a ceramic layer having first and second main sides, an upper metal layer disposed on the first main side and a lower metal layer disposed on the second main side and an electrically conductive bottom plate that is connected to the ceramic layer via the lower metal layer. Further, an edge metallization is disposed at a distance from the upper metal layer on the first main side of the ceramic layer. The edge metallization is entirely surrounding the upper metal layer to form afield emission area and is also electrically connected to the lower metal layer through a low impedance.
The substrate according to the present invention, which comprises a ceramic that layer that is provided with two metal layers, has means following the edges of the upper metal layer at the surface of the ceramic layer, that limit the amount of the electrical field intensity at the edges of the metal layers. Limiting the electrical field intensity at the edges of the metal layers is effected in order to prevent high electrical field intensities occurring at this location and possibly damaging a maximum power unit produced with the substrate. The invention provides, therefore, an even distribution of the electrical potential at the surface of the ceramic layer. For example, equipotential bonding (i.e., even distribution) is caused by an electrically conducting layer that is of sufficient high-impedance and thinness at the top side of the ceramic layer and with which the edges of the upper metal layer are connected to the lower metal layer in a high-impedance fashion. Preferably, this layer is sufficiently conductive in order to also effect a sufficient equipotential bonding with respect to rapid switching processes within the high voltage region (such as typically 6 kV/&mgr;s through 10 kV/&mgr;s). Another exemplary embodiment provides attaching an electrical conductor respectively lateral at the edges of the upper metal layer wherein the electrical conductor is increasingly upwardly bent with increasing distance from a corresponding edge. Alternatively, an edge metallization that is distanced from the upper metal layer and that surrounds the upper metal layer can be provided on the top side of the ceramic layer, wherein the edge metallization is connected to the lower metal layer in a low-impedance manner.
Additional advantages and novel features of the invention will be set forth, in part, in the description that follows and, in part, will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
REFERENCES:
patent: 6054762 (2000-04-01), Sakuraba et al.
patent: 6124635 (2000-09-01), Kuwabara
patent: 6157076 (2000-12-01), Azotea et al.
patent: 10335631-A (1998-12-01), None
Bayerer Reinhold
Lefranc Guy
Leuschner Rainer
Stoisiek Michael
Flynn Nathan
Forde Remmon R.
Schiff & Hardin & Waite
Siemens Aktiengesellschaft
LandOfFree
Substrate for high-voltage modules does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Substrate for high-voltage modules, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Substrate for high-voltage modules will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2577117