Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1999-07-20
2002-02-05
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S455000, C438S457000
Reexamination Certificate
active
06344375
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a substrate containing a compound semiconductor layer, a method for manufacturing the same, and a semiconductor device using the same.
2. Description of the Prior Art
In recent years, semiconductor devices, for example blue-light-emitting elements or high-temperature high-speed transistors, using a Group III nitride compound semiconductor as expressed by the general formula Ga
x
Al
y
In
z
N (0≦x≦1; 0≦y≦1; 0≦z≦1; x+y+z=1) have gained widespread attention. To make such a semiconductor device, a Group III nitride-based compound semiconductor is formed on a sapphire substrate or a silicon carbide (SiC) substrate by crystal growth, since it is difficult to obtain a single crystal substrate made of a Group III nitride-based compound semiconductor.
Recently, Group III nitride-based compound semiconductors formed on a silicon (Si) substrate and growth methods for the same have been proposed (see for example Publication of Unexamined Japanese Patent Application (Tokkai) No. Hei 5-343741 and Tokkai Hei 9-92882). Silicon substrates can be produced at low cost and with high diameters, they are semi-conducting and have good cleavage, they have better heat conductivity than sapphire for example, and their good heat conductivity is advantageous when they are used for light-emitting devices.
FIG. 13
shows an example of a conventional Group III nitride-based compound semiconductor substrate, made with a Si substrate. As shown in
FIG. 13
, this conventional Group III nitride-based compound semiconductor substrate includes a Si substrate layer
1
, a buffer layer
2
deposited on the Si substrate layer
1
, and an epitaxial layer
3
made of a Group III nitride compound semiconductor. The buffer layer
2
is made of, for example, a Group III nitride compound semiconductor expressed by the general formula Ga
t
Al
1−t
N (with 0≦t<1), amorphous Si, or polycrystalline Si.
FIG. 14
illustrates a conventional method for manufacturing the Group III nitride compound semiconductor shown in FIG.
13
. First, a buffer layer
2
is formed on a Si substrate
1
, as shown in FIG.
14
(
a
). Then, an epitaxial layer
3
is grown on the buffer layer
2
, as shown in FIG.
14
(
b
).
However, if such a conventional buffer layer
2
is used, there is the problem that lattice mismatching between the substrate layer
1
and the epitaxial layer
3
cannot be relaxed sufficiently, and the crystallinity of the epitaxial layer
3
is insufficient. Moreover, if amorphous Si or polycrystalline Si is used for the buffer layer
2
, there is the problem that the surface planarity of the epitaxial layer is poor. Also, there is the problem that in most cases, the hardness of the Group III nitride compound semiconductor layer is higher than the hardness of the substrate, which causes strain in the epitaxial layer
3
and easily can result in cracks in the epitaxial layer
3
.
SUMMARY OF THE INVENTION
It is an object of the present invention to solve these problems, and to provide a substrate containing a compound semiconductor layer including a Group III nitride-based compound semiconductor with good surface planarity and crystallinity, a method for manufacturing the same, and a semiconductor device using the same.
An inventive substrate containing a compound semiconductor layer includes a substrate layer, a first semiconductor layer formed on the substrate layer, and a second semiconductor layer formed on the first semiconductor layer. The first semiconductor layer has a plurality of pores. The second semiconductor layer is made of a Group III nitride-based compound semiconductor (that is, a III-V compound semiconductor including mainly a Group III nitride compound semiconductor, for example a III-V compound semiconductor in which nitrogen accounts for at least 90% of the Group V atoms). In this substrate, a first semiconductor layer having a plurality of pores is formed on a substrate layer. This first semiconductor layer absorbs strain due to lattice mismatching between the substrate layer and the Group III nitride-based compound semiconductor layer and also strain due to a difference of their thermal expansion coefficients. Consequently, a substrate containing a compound semiconductor layer including a Group III nitride-based semiconductor with excellent crystallinity and surface planarity can be obtained. Furthermore, since strain in the second semiconductor layer is suppressed, cracks due to the high hardness of the Group III nitride-based semiconductor can be avoided.
It is preferable that the first semiconductor layer of the inventive substrate is a buffer layer, and the second semiconductor layer is an epitaxial layer.
It is preferable that the substrate layer in this inventive substrate is made of a Si single crystal, and the first semiconductor layer is made of a Si single crystal having a plurality of pores. With this configuration, the crystal orientation of the Group III nitride-based compound semiconductor formed thereon can be aligned. Also, since Si has excellent heat radiation properties, the heat radiation properties of the substrate containing a compound semiconductor layer obtained with this configuration are excellent. Also, since this configuration suppresses strain in the epitaxial layer, the number of cracks in the epitaxial layer can be reduced, even when the hardness of the Group III nitride-compound semiconductor is higher than the hardness of the Si.
In the substrate according to the present invention, it is preferable that the substrate layer is made of a Si single crystal, and the first semiconductor layer includes a Si single crystal layer having a plurality of pores, and a Group III nitride-based compound semiconductor layer formed on the Si single crystal layer. Since in this configuration a first semiconductor layer including a Si single crystal layer having a plurality of pores, and a Group III nitride-based compound semiconductor layer functions as the buffer layer, the crystal orientation of the Group III nitride-based compound semiconductor layer, i.e. the epitaxial layer, can be aligned even better. Moreover, the Group III nitride-based compound semiconductor can relax bumps in the substrate surface that originate in the Si having a plurality of pores.
It is preferable that the first semiconductor layer in the substrate according to the present invention is made of a Group III nitride-based compound semiconductor. With this configuration, the crystallinity of the substrate containing a compound semiconductor layer can be improved even more.
It is preferable that the first semiconductor layer in the substrate according to the present invention includes a dopant. This configuration facilitates the formation of the pores. It is preferable that the average diameter of the pores in the substrate according to the present invention is at least 3 nm and at most 10 nm. If the average diameter of the pores is at least 3 nm, the lattice mismatch between the substrate layer and the second semiconductor layer can be relaxed effectively. If the diameter of the pores is at most 10 nm, the pores do not deteriorate the surface morphology of the second semiconductor layer.
In accordance with the present invention, a method for manufacturing a substrate containing a compound semiconductor layer includes a first step of forming a semiconductor layer having a plurality of pores on a substrate layer, and a second step of epitaxially growing a Group III nitride-based compound semiconductor layer on the semiconductor layer. In this manufacturing method, the semiconductor layer having a plurality of pores functions as a buffer layer, so that a Group III nitride-based compound semiconductor with good crystallinity can be grown epitaxially. Consequently, with this manufacturing method, a substrate containing a compound semiconductor layer including a Group III nitride-based compound semiconductor with excellent crystallinity and surface planarity can be manufactured. In particular
Isida Masahiro
Nakamura Shinji
Orita Kenji
Uemura Nobuyuki
Yuri Masaaki
Lebentritt Michael S.
Matsushita Electric Industrial Co. Ltd
Merchant & Gould P,C,
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