Substrate and manufacturing method of the same

Details Substrate and manufacturing method of the same Substrate and manufacturing method of the same

2008-12-24

2010-11-30

Pham, Thanhha (Department: 2894)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S612000, C257SE21597

Reexamination Certificate

active

07842611

ABSTRACT:
According to the present invention, on a double-sided substrate1, a plurality of through-holes2connected to one wire6for plating as well as wiring are collectively arranged within a narrow range close to the connection portion. After a plating process, a penetrating hole12is formed and the connection potion is cut off. Thus, the wire6for plating and the collectively arranged through-holes2are made independent of one another so that no electric conduction occurs among the wire6for plating and the through-holes2.

REFERENCES:
patent: 6506982 (2003-01-01), Shigi et al.
patent: 7355273 (2008-04-01), Jackson et al.
patent: 2002/0157958 (2002-10-01), Kikuchi et al.
patent: 58-110094 (1983-06-01), None

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