Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-06-05
2007-06-05
Smoot, Stephen W. (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S656000, C438S664000, C438S683000, C438S688000, C257S763000, C257S765000, C257SE21585
Reexamination Certificate
active
11030035
ABSTRACT:
A submicron contact opening fill using a chemical vapor deposition (CVD) TiN liner/barrier and a high temperature, e.g., greater than about 385° C., physical vapor deposition (PVD) aluminum alloy layer that substantially fills the submicron contact.
REFERENCES:
patent: 5049975 (1991-09-01), Ajika et al.
patent: 5371042 (1994-12-01), Ong et al.
patent: 5521120 (1996-05-01), Nulman et al.
patent: 5828131 (1998-10-01), Cabral et al.
patent: 5918149 (1999-06-01), Besser et al.
patent: 5962923 (1999-10-01), Xu et al.
patent: 6045666 (2000-04-01), Satitpunwaycha et al.
patent: 6114764 (2000-09-01), Hoshino et al.
patent: 6191033 (2001-02-01), Liao et al.
patent: 6313042 (2001-11-01), Cohen et al.
patent: 6511910 (2003-01-01), Asahina et al.
Kline Harold E.
Williams Jacob Lee
Baker & Botts L.L.P.
Microchip Technology Incorporated
Smoot Stephen W.
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