Structures, fabrication methods, design structures for...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE29001, C257SE21090, C438S479000

Reexamination Certificate

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08053838

ABSTRACT:
A semiconductor structure, a fabrication method, and a design structure for a FinFet. The FinFet includes a dielectric layer, a central semiconductor fin region on the dielectric layer, a first semiconductor seed region on the dielectric layer, and a first strain creating fin region. The first semiconductor seed region is sandwiched between the first strain creating fin region and the dielectric layer. The first semiconductor seed region includes a first semiconductor material. The first strain creating fin region includes the first semiconductor material and a second semiconductor material different than the first semiconductor material. A first atom percent of the first semiconductor material in the first semiconductor seed region is different than a second atom percent of the first semiconductor material in the first strain creating fin region.

REFERENCES:
patent: 6897527 (2005-05-01), Dakshina-Murthy et al.
patent: 7193279 (2007-03-01), Doyle et al.
patent: 2004/0256647 (2004-12-01), Lee et al.
patent: 2006/0157687 (2006-07-01), Doyle et al.
patent: 2006/0211259 (2006-09-01), Maes et al.

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