Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2006-08-04
2008-07-22
Malsawma, Lex (Department: 2892)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C257SE21576
Reexamination Certificate
active
07402532
ABSTRACT:
An interconnect structure in which the adhesion between an upper level low-k dielectric material, such as a material comprising elements of Si, C, O, and H, and an underlying diffusion capping dielectric, such as a material comprising elements of C, Si, N and H, is improved by incorporating an adhesion transition layer between the two dielectric layers. The presence of the adhesion transition layer between the upper level low-k dielectric and the diffusion barrier capping dielectric can reduce the chance of delamination of the interconnect structure during the packaging process. The adhesion transition layer provided herein includes a lower SiOx- or SiON-containing region and an upper C graded region. Methods of forming such a structure, in particularly the adhesion transition layer, are also provided.
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Chiras Stefanie R.
Clevenger Lawrence A.
Dalton Timothy
Demarest James J.
Dunn Derren N.
Malsawma Lex
Scully , Scott, Murphy & Presser, P.C.
Trepp, Esq. Robert M.
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