Structure of stacked, complementary MOS field effect transistor

Details Structure of stacked, complementary MOS field effect transistor Structure of stacked, complementary MOS field effect transistor

1983-11-04

1985-11-26

Edlow, Martin H.

357 59, H01L 2904, H01L 2702

Patent

active

045557217

ABSTRACT:
A method is disclosed for fabricating series and/or parallel connected P channel and N channel FET device topologically connected in a CMOS configuration, where the individual FET devices share a common gate sandwiched between them, forming a five terminal device. A new device structure and complementary MOSFET circuitry is also disclosed. The disclosed process produces devices and circuits which overcome the main disadvantage of prior art CMOS transistors, namely excessive area consumption and parasitic effects.

REFERENCES:
patent: 4272880 (1981-06-01), Pashley
RCA COS/MOS Integrated Circuits Manual, pp. 18-21, 26, 27, 30-33, 1971, USA.

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