Structure of plated wire of fiducial marks for die-dicing...

Details Structure of plated wire of fiducial marks for die-dicing... Structure of plated wire of fiducial marks for die-dicing...

2002-06-06

2003-05-27

Clark, Jasmine J B (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Alignment marks

C257S620000, C257S048000, C438S462000

Reexamination Certificate

active

06570263

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a chip-array ball grid array (CA BGA) package, and more particularly relates to a structure of the design of a plated wire for the die dicing package.
2. Description of the Prior Art
In the package process of the integrated circuits manufacture, the die dicing method of the chip-array ball grid array utilizes the slaw type technology. So, in the backside of the substrate, the fiducial mark is designed for using as the fixing fiducial point and for identifying the specific of the product. Hence, the accuracy of the position and shape of the fiducial mark is seriously required.
Referring to the
FIG. 1
, chip array
30
is configured with grid array solder ball
22
thereon. In the design of the fiducial mark
16
, in order to match the process tolerance of the substrate and the consideration of the substrate layout, fiducial mark
16
is generally very close to the cutting line
11
land cutting line
13
. Besides, the solder mask opening
18
is extended to the plate wires
12
,
14
of the cutting line to make the fiducial mark
16
achieve the required accuracy of the cutting process. In the solder mask opening
18
, the fiducial mark
16
is designed to connect to the shortest plated wire
20
of the plated wires
14
of the cutting line, such as shown in the cutaway view of the FIG.
2
. The front side and the backside of the substrate
10
are coated with solder mask
24
,
26
. Owing to the plated wire
20
of the solder mask opening
18
is exposed, so the cutter will cause the burr problem by naturally polishing and consume under the structure of this plated wire design. Referring to the
FIG. 3
, in the die dicing process, the cutter is consumed and become un-sharp, so the plated wire
20
is pulled by the cutter and causing the burr effect. Furthermore, the burr effect will cause the problem in the following processes, such as the final test, the surface mount technology (SMT), and etc.
In order to solve the burr problem, the operator usually has to shut down the machine to replace the cutter and need to polish the consumed cutter for cutting the plated wire. So as the normal life of the cutter is shortened and it has to increase the safety storage of the cutter. It increases the cost of polishing the cutter and the rework cost of the die dicing burr product. Furthermore, it substantially decreases the product efficiency and increases the manufacture cost.
Obviously, the main spirit of the invention is to provide a new plated wire design structure of a fiducial mark of the substrate, and then some disadvantages of well-known technology are overcome.
SUMMARY OF THE INVENTIONS
The primary object of the invention is to provide a new structure of the plated wires of the fiducial marks of the substrate which is utilizing the coverage of the solder mask to solve the burr effect of the die dicing without the pulling problem of the plated wires by the cutter.
Another object of the invention is to provide a structure of the plated wire of the fiducial mark of the substrate, which can enhance the process efficiency without shutting down the machine for polishing the cutter, and without the problem of the defect burr product.
A further object of the invention is to provide a structure of the plated wire of the fiducial mark of the substrate, which can decrease the manufacture cost by elongating the use life of the cutter and reducing the polishing cost and the rework cost of the defect burr product.
In order to achieve previous objects, the present invention is to pull the plated wire connecting with the fiducial mark out of the opening region, and then to the plated wire of the cutting line. So as utilizing the coverage of the solder mask, the plated wire can be accurately cut without pulling by the cutter to solve the burr problem of the prior art.
Other aspects, features, and advantages of the present invention will become apparent as the invention becomes better understood by reading the following description in conjunction with the accompanying drawings.


REFERENCES:
patent: 5777392 (1998-07-01), Fujii
patent: 5990567 (1999-11-01), Tseng et al.
patent: 6329700 (2001-12-01), Ishimura et al.
patent: 6350548 (2002-02-01), Leidy et al.
patent: 6200824 (2002-03-01), Hashimoto
patent: 6373548 (2002-04-01), Kim
patent: 6400037 (2002-06-01), Omizo
patent: 1-137238 (1989-05-01), None
patent: 2-307206 (1990-12-01), None
patent: 6-204101 (1994-07-01), None

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