Structure of a CMOS image sensor

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S291000, C257S292000, C257S293000, C438S048000, C438S070000

Reexamination Certificate

active

06507059

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a structure of a photodiode image sensor device and a method for fabricating the same, and more particularly to a structure of a complimentary metal-oxide semiconductor (CMOS) image sensor and a method of fabricating the same.
2. Description of the Related Art
A photodiode image sensor is a commonly found image sensor element. A typical photodiode image sensor is a sensing region and comprises at least a reset transistor and a diode. For example, a diode is formed from a N-type doping region while a P-type substrate serves as the sensing region. In operation, a voltage is applied to the gate electrode of reset transistor so that after initiation of the reset transistor, the N/P diode junction capacitor is charged. When a high potential is attained during charging, the reset transistor is switched off, so that the N/P diode produces reverse bias to form a void region. When light strikes the N/P diode sensing region, the produced electron-holes are divided by the electric field of the void region such that electrons move toward the N-type doping region and the potential of the N-type doping region is reduced, and the electron-holes move to the P-type substrate.
A charge-coupled device (CCD) possesses dynamic range, low dark current and the technology development thereof is mature. As a result, it is the most commonly employed image sensor. However, the fabrication process of CCD is specific, which causes the costs to be expensive, and drive circuits must be operated with high voltage which causes high power dissipation. Further random access problems cannot be solved.
The CMOS image sensor possesses high quantum efficiency, low Read noise, high Dynamic range and random access and is fully compatible with the CMOS fabrication process. Thus, a CMOS can be integrated onto a chip with other controlled circuits, A/D converter circuits and digital signal treatment circuits, thereby creating a system on a chip (SOC). Thus, a CMOS image sensor fabrication process greatly reduces the cost of an image sensor, pixel size, and power dissipation. Accordingly, in recent years, CMOS image sensors have been used to replace CCDs.
A conventional fabrication method of CMOS image sensor is briefly described as follows:
Referring to
FIG. 1A
, first, a field oxide layer
102
, a gate oxide layer
104
of a reset transistor
130
and a polycrystalline silicon gate electrode
106
are formed on a substrate
100
. Next, the field oxide layer
102
and the polycrystalline silicon gate electrode
106
are used as an implant masking screen for an ion implantation and thermal driving in fabrication process whereby a source/drain region
108
and a doping region
112
of the photodiode sensing region
110
are formed in the substrate
100
.
After that, at the lateral wall of the polycrystalline silicon gate electrode
106
and the gate electrode oxide layer
104
, a spacer
114
is formed. After that, a self-aligned barrier (SAB
116
) is formed on the photodiode sensing region
110
so as to form a photodiode CMOS image sensing element.
The backend process of forming a photodiode CMOS image sensing element is shown in FIG.
1
B. In the backend process, for example, a dielectric layer
118
is formed on the substrate
100
, and then a metallic conductive wire
120
is formed is formed on the dielectric layer
118
. After that, a dielectric layer
122
is formed over the substrate
100
, and a metallic conductive wire
124
is formed on the dielectric layer
122
.
However, the CMOS image sensor obtained by the conventional fabrication process has the following drawbacks:
In the course of the backend process, for instance, in defining the contact window/dielectric layer window opening and defining the metallic conductive, a plasma etching process must be used. This plasma etching method possesses relatively large energy which will cause a relatively large voltage drop. This voltage drop not only damages common transistor elements but also damages the surface of the photodiode sensing region. In particular, the damage by the plasma at the bird's beak region of the field oxide periphery is more serious. Thus, the photodiode sensing region produces current leakage. This current leakage problem in turn causes the sensor to produce a relatively large dark current, causing Read Noise to increase.
Further, in the course of forming a plurality of sensors on the same wafer, the numerical size distribution of the dark current for a single sensor has a relatively large range, ie., the difference between the numerical values of the dark current of every sensor can be very large and this causes non-uniformity in the sensors.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a structure of a CMOS image sensor and method for fabricating the same, wherein a protective layer is formed between the surface of the element and the dielectric layer, and is also formed between each dielectric layers to prevent damage by plasma.
Yet another object of the present invention to provide structure of a CMOS image sensor and method for fabricating the same, wherein the problem of dark current can be reduced to a minimum.
Another object of the present invention to provide structure of a CMOS image sensor and method for fabricating the same, wherein the uniformity of a CMOS image sensor can be increased.
One aspect of the present invention is to provide a structure of a CMOS image sensor comprising a photodiode sensing region, a transistor element region, a transistor, a self-aligned barrier, a dielectric layer and a first, second protective layers, wherein the photodiode sensing region and the transistor element region are located on the substrate and the transistor is located on the transistor element region. The self-aligned barrier is located on the photodiode sensing region, and the first protective layer is located on the entire substrate and covers the self-aligned barrier. A plurality of dielectric layers are each formed on the first protective layer, wherein each of the dielectric layers is separated from the first protective layer by different heights, and a plurality of second protective layers, each of which is mounted on the adjacent dielectric layers.
Yet another aspect of the present invention is to provide a method of fabricating a CMOS image sensor. An isolation layer is formed on a substrate to partition the substrate into a photodiode sensing region and a transistor element region. Next, on the transistor element region, a gate electrode structure is formed and a lightly ion implantation process is performed such that a lightly drain doping region is formed on the transistor element and a lightly doped region is formed on the photodiode sensing region. After that, a spacer is formed on the gate electrode structure and a high ion implantation step is performed so that a source/drain region is formed on the transistor element and a highly doped region is formed on the photodiode sensing region. After that, after a layer of self-aligned barrier is formed on the photodiode sensing region, a layer of protective layer is formed on the substrate so as to cover the entire substrate. The material between the protective layer and the self-aligned barrier layer possesses different refractivity. After that, the backend process of the sensor element is performed. In the backend process, by forming successive dielectric layers and metallic conductive wires on the protective layerand then a protective layer thereon, in which the number of dielectric layers and the metallic wires depend on the fabrication process, a protective layer is formed between each dielectric layers.
In view of the above, the present invention is characterized by, after the formation of the photodiode CMOS image sensor, covering the entire substrate with a protective layer. The invention is further characterized by forming a protective layer between dielectric layers in the back-end process. By means of the action of the protective l

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Structure of a CMOS image sensor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Structure of a CMOS image sensor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Structure of a CMOS image sensor will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3041320

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.