Structure having flip-chip connected substrates

Details Structure having flip-chip connected substrates Structure having flip-chip connected substrates

1995-03-27

1998-04-21

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

257737, 257774, 257780, H01L 2348, H01L 2352

Patent

active

057421005

ABSTRACT:
A flip-chip structure and method connects a semiconductor chip (11) having conductive bumps (16) to a substrate (12) having vias (19) extending from a first side (21) to a second side (18) of the substrate (12). A filler material (22) is deposited into the vias (19), and the conductive bumps (16) are inserted into the vias (19) for connecting the semiconductor chip (11) to a conductive element (17) covering the vias (19) on the second side (18) of the substrate (12).

REFERENCES:
patent: 4807021 (1989-02-01), Okumura
patent: 5189507 (1993-02-01), Carlomagno et al.
patent: 5237130 (1993-08-01), Kulesza et al.
patent: 5299730 (1994-04-01), Pasch et al.
patent: 5347162 (1994-09-01), Pasch
patent: 5363277 (1994-11-01), Tanaka
patent: 5378869 (1995-01-01), Marrs et al.
Yoshihiro Bessho et al.; IEEE; A Stud-Bump-Bonding Technique for High Density Multi-Chip-Module; Jun. 9-11, 1993 Japan IEMT Symposium; pp. 362-365.
Howard W. Markstein; "Multichip Modules Pursue Wafer Scale Performance"; Oct. 1, 1991; Electronic Packaging and Production; vol. 31, No. 10; pp. 40-45.

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