Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Patent
1996-04-26
1998-09-01
Hardy, David B.
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
257528, 257758, 257773, 257776, 438 14, H01L 2358
Patent
active
058013946
ABSTRACT:
A test line (12) is formed between a pair of current sypplying terminals (11). A step pattern (14) composed of polysilicon or the like is formed below the test line (12) through an inter-layer insulation film. One of two sides of the step pattern (14) that extends along the longitudinal direction of the test line (12) is positioned therebelow so as to form a step extending in a direction of the test line. Thus, since electromigration tends to easily take place, the deterioration of the semiconductor device can be precisely evaluated.
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IBM Technical Disclosure Bulletin (vol. 34, No. 12, May 1992) "On-Chip Electromigration Sensor Using Silicon Device," p. 197.
Liew, B.K., et al., "Reliability Simulator for Interconnect and Intermetallic Contact Elecromigration." Proc. 28.sup.th Int. Reliab. Phys. Symp. IEEE, pp. 111-118, 1990.
"Step Spacing Effect on Electromigration", Proc. 1990, IEEE/IRPS, pp. 20-24, 1990. no month.
Hardy David B.
NEC Corporation
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