Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2008-03-19
2010-10-26
Guyton, Philip (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S031000, C714S045000
Reexamination Certificate
active
07823017
ABSTRACT:
Disclosed is a design structure for an apparatus for a task based debugger (transaction-event-job-trigger). More specifically, an integrated event monitor for a SOC comprises functional cores each having a functional debug logic element. The cores are connected to an interconnect structure that links the functional debug logic elements. Each functional debug logic element is specifically dedicated to a function of its corresponding core, wherein the functional debug logic elements generate a table of function-specific system events. The system events are function-specific with respect to an associated core, wherein the system events include transaction events, controller events, processor events, interconnect structure arbiter events, interconnect interface core events, high speed serial link core events, and/or codec events.
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Bueti Serafino
Goodnow Kenneth J.
Leonard Todd E.
Mann Gregory J.
Woodruff Charles S.
Gibb I.P. Law Firm LLC
Guyton Philip
International Business Machines - Corporation
LeStrange, Esq Michael J.
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