Structure for memory chip for high capacity memory subsystem...

Details Structure for memory chip for high capacity memory subsystem... Structure for memory chip for high capacity memory subsystem...

2008-03-21

2011-10-11

Lo, Kenneth M (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

C711S165000, C711S150000, C711SE12006

Reexamination Certificate

active

08037272

ABSTRACT:
A design structure is provided for a memory module containing an interface for receiving memory access commands from an external source, in which a first portion of the interface receives memory access data at a first bus frequency and a second portion of the interface receives memory access data at a second different bus frequency. Preferably, the memory module contains a second interface for re-transmitting memory access data, also operating at dual frequency. The memory module is preferably used in a high-capacity memory subsystem organized in a tree configuration in which data accesses are interleaved. Preferably, the memory module has multiple-mode operation, one of which supports dual-speed buses for receiving and re-transmitting different parts of data access commands, and another of which supports conventional daisy-chaining.

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