Structure for controlling impedance and cross-talk in a printed

Active solid-state devices (e.g. – transistors – solid-state diode – Transmission line lead

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Details

333238, 307408, 307409, 174253, H01L 2312, H01P 308, H03K 1780

Patent

active

051842106

ABSTRACT:
An arrangement for interconnecting high density signals of integrated circuits includes an electronic circuit on a multilayered substrate which includes at least three layers. These layers comprise a signal layer for carrying signals in the electronic circuit, a dielectric layer of organic material disposed adjacent the signal layer, and a metallic reference layer. The layers are disposed such that the dielectric layer is between the signal layer and the metallic reference layer. For providing controlled line impedance and for reducing cross-talk between the signals carried in the electronic circuit, the metallic reference layer includes uniformly spaced apertures which are situated in a slanted grid arrangement.

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patent: 4490690 (1984-12-01), Suzuki
patent: 4551746 (1985-11-01), Gilbert et al.
patent: 4560962 (1985-12-01), Barrow
patent: 4725878 (1988-02-01), Miyauchi et al.
patent: 4774632 (1988-09-01), Neugebauer
patent: 4827327 (1989-05-01), Miyauchi et al.
patent: 4855871 (1989-08-01), Young

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