Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2011-03-01
2011-03-01
Clark, Jasmine J (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S707000, C257S718000, C257S719000, C257SE33075, C257SE23051, C438S122000, C228S178000, C228S179100, C228S222000, C228S227000
Reexamination Certificate
active
07898076
ABSTRACT:
Assemblies for dissipating heat from integrated circuits and circuit chips are disclosed. The assemblies include a low melt solder as a thermal interface material (TIM) for the transfer of heat from a chip to a heat sink (HS), wherein the low melt solder has a melting point below the maximum operating temperature of the chip. Methods for making the assemblies are also disclosed.
REFERENCES:
patent: 4123293 (1978-10-01), Okikawa et al.
patent: 7180179 (2007-02-01), Mok et al.
patent: 7311967 (2007-12-01), Dani et al.
patent: 7364063 (2008-04-01), Schaenzer et al.
patent: 2006/0261467 (2006-11-01), Colgan et al.
Furman Bruce
Iyengar Madhusudan K.
Lauro Paul A.
Martin Yves
Schmidt Roger R.
Clark Jasmine J
Connolly Bove & Lodge & Hutz LLP
International Business Machines - Corporation
Morris Daniel P.
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