Structure and method of cache memory data update

Details Structure and method of cache memory data update Structure and method of cache memory data update

2006-09-26

2006-09-26

Thai, Tuan V. (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S100000, C711S154000, C711S122000

Reexamination Certificate

active

07114031

ABSTRACT:
The present invention relates to a structure and a method of data update in a cache memory inside a local processor, which uses the feature of cache control. A buffer block of a header buffer is mapped to a memory space at several different address sectors addressed by the local processor. Whenever the local processor attempts to access the internal cache memory, cache missing will occur so that a local processor will be forced to alternatively request new data from buffer blocks of a header buffer in a HCA. Consequently, the whole block is loaded into cache memory. This does not only boost cache update performance but also accelerates packet access.

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