Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-08-02
2005-08-02
Myers, Paul R. (Department: 2112)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
Reexamination Certificate
active
06925583
ABSTRACT:
According to the invention, a JTAG-compliant chip is further provided with a controller that receives data provided on the TDI input pin, forms parallel address and data instructions and passes the data through IO pins to the non-JTAG chip without requiring the data to go through the boundary scan register chain of the JTAG-compliant chip. This controller is used to program, erase, and read the other chip. For a non-JTAG flash memory device, the controller in the JTAG-compliant chip generates the necessary programming signal sequences, and applies them to the non-JTAG chip without going through the JTAG boundary scan circuitry.
REFERENCES:
patent: 5689516 (1997-11-01), Mack et al.
patent: 5706297 (1998-01-01), Jeppesen et al.
patent: 5708773 (1998-01-01), Jeppesen et al.
patent: 6112298 (2000-08-01), Deao et al.
patent: 6243842 (2001-06-01), Slezak et al.
patent: 6266801 (2001-07-01), Jin
patent: 6324096 (2001-11-01), Tomita
patent: 6421812 (2002-07-01), Wang et al.
patent: 6430719 (2002-08-01), Slezak et al.
patent: 6732311 (2004-05-01), Fischer et al.
patent: 6757844 (2004-06-01), Lulla et al.
Narayanan et al., “Reconfigurable Scan Chains: A Novel Approach to Reduce Test Application Time”, IEEE, 1993, pp. 710-715.
Robinson, Gordon D. “Why 1149.1 (JTAG) Really Works”, Electro/94 International. Conference Proceedings Combined Volumes, May 10-12, 1994, pp. 749-754.
“Boundary Scan Descriptive Language for Non-JTAG Components” IBMTDB, Oct. 1993, vol. 36, issue No. 10, pp. 599-600.
XAPP017 (v3.0), “Boundary-scan in XC4000, Spartan and XC5200 Series Devices”, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124, Nov. 16, 1999, pp 1-17.
Khu Arthur H.
Shokouhi Farshid
Tawade Pushpasheel
Theron Conrad A.
Cartier Lois D.
Maunu LeRoy D.
Myers Paul R.
Xilinx , Inc.
Young Edel M.
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