Structure and method for screening SRAMS

Details Structure and method for screening SRAMS Structure and method for screening SRAMS

2009-07-14

2011-11-22

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Testing

C365S154000, C365S230060

Reexamination Certificate

active

08064279

ABSTRACT:
An integrated circuit containing an SRAM that provides a switch to decouple the SRAM wordline voltage from the SRAM array voltage during screening and that also provides different wordline and array voltages during a portion of the SRAM bit screening test. A method for screening SRAM bits in an SRAM array in which the wordline voltage is different than the array voltage during a portion of the screening test.

REFERENCES:
patent: 6085334 (2000-07-01), Giles et al.
patent: 6148426 (2000-11-01), Kim et al.
patent: 6343366 (2002-01-01), Okitaka
patent: 2005/0034040 (2005-02-01), Lay
Xiaowei Deng et al., “Structure and Methods for Measuring Margins in an SRAM Bit,” Nonprovisional Patent Application Filed Feb. 18, 2009; U.S. Appl. No. 12/388,439.
Xiaowei Deng et al., “Method of Constructing SHMOO Plots for SRAMS,” Nonprovisional Patent Application Filed Mar. 10, 2009; U.S. Appl. No. 12/401,181.

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