Structure and method for providing prioritized arbitration in a

Static information storage and retrieval – Addressing – Multiple port access

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36523002, 365233, 36518902, G11C 800

Patent

active

053982118

ABSTRACT:
An integrated circuit dual port memory provides a preferred port which is always granted priority of memory access when memory access requests arrive simultaneous from both ports of the dual port memory. To implement this priority scheme, the memory request signal from the preferred port controls a multiplexor to select the input signals from the preferred port over the input signals from the non-preferred port. The memory request signal from the preferred port also serves as a busy signal to block a simultaneous memory access by the non-preferred port. In one embodiment, memory request signals of both ports are latched into registers clocked by the same clock signal.

REFERENCES:
patent: 4796232 (1989-01-01), House
patent: 4967398 (1990-10-01), Jamoua et al.
patent: 5001671 (1991-03-01), Koo et al.
patent: 5142540 (1992-08-01), Glasser
patent: 5276842 (1994-01-01), Sugita

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