Structure and method for providing additional configuration memo

Details Structure and method for providing additional configuration memo Structure and method for providing additional configuration memo

1998-03-04

2000-01-04

Le, Vu A.

Static information storage and retrieval

Read/write circuit

Serial read/write

326 38, 326 41, H03K 19177

Patent

active

060117400

ABSTRACT:
Described is a programmable logic device with on-chip configuration memory for controlling the state of various programming points. Each programming point includes two or more sequential memory elements, each of which may be programmed to include a data bit associated with a different circuit configuration. The state of an accessed one of the sequential memory elements (i.e., the bit of configuration data currently stored in that memory element) dictates the current FPGA configuration. Alternate configuration bits are stored in the remaining memory elements. The configuration of the FPGA may then be changed by sequentially shifting a data bit from one of the inactive memory cells into the active memory cell. In one embodiment the sequential memory cells are configured in a ring to support alternating between two or more configurations.

REFERENCES:
patent: 4750155 (1988-06-01), Hsieh
patent: 4821233 (1989-04-01), Hsieh
patent: 5095462 (1992-03-01), Norris
patent: 5646545 (1997-07-01), Trimberger et al.
patent: 5910732 (1999-06-01), Trimberger

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