Structure and method for managing available memory resources

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring

Reexamination Certificate

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Details

C711S005000, C711S119000, C711S122000, C711S129000, C711S147000, C711S153000, C711S170000, C713S001000, C713S100000

Reexamination Certificate

active

06907508

ABSTRACT:
In a digital data processing system having a memory component, a structure and method for managing available memory resources. Free pointers to respective free memory blocks are stored in memory blocks maintained as a linked list. In a system having a hierarchically-organized memory component, a small number of the free pointers are maintained at a relatively higher performance level of the memory and the balance of the free pointers are maintained at a relatively lower performance level of the memory.

REFERENCES:
patent: 5426639 (1995-06-01), Follett et al.
patent: 6754744 (2004-06-01), Kim et al.
patent: 6754795 (2004-06-01), Chen et al.
patent: 2003/0121030 (2003-06-01), Koob et al.
patent: 2004/0131055 (2004-07-01), Calderon et al.

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