Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2008-06-20
2010-10-05
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S009000, C438S197000, C438S680000, C257SE21170, C257SE21023, C257SE21051, C257SE21229, C257SE21278, C257SE21293, C257SE21545
Reexamination Certificate
active
07807576
ABSTRACT:
A semiconductor structure which includes a trench gate FET is formed as follows. A plurality of trenches is formed in a semiconductor region using a mask. The mask includes (i) a first insulating layer over a surface of the semiconductor region, (ii) a first oxidation barrier layer over the first insulating layer, and (iii) a second insulating layer over the first oxidation barrier layer. A thick bottom dielectric (TBD) is formed along the bottom of each trench. The first oxidation barrier layer prevents formation of a dielectric layer along the surface of the semiconductor region during formation of the TBD.
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Fairchild Semiconductor Corporation
Nhu David
Townsend and Townsend / and Crew LLP
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