Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2008-03-05
2008-10-28
Chen, Kin-Chan (Department: 1792)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S700000, C438S702000, C438S720000
Reexamination Certificate
active
07442647
ABSTRACT:
A structure and method for fabricating a top strap in a magnetic random access memory, MRAM, comprising a damascene process forming a trench in a dielectric layer and resulting in a metal conductor clad on three sides by an inverted U-shape trench liner and cap made up of three layers consisting of a stack of a ferromagnetic material sandwiched between two layers of a refractory metal or an alloy of a refractory metal. First the two sidewalls of the trench are formed with the cladding layer, followed by filling the trench with the metal conductor. In preparing the structure for the capping layer, the metal conductor is recessed with an etch that is selective to the metal conductor over the sidewall stack. This preparation may be performed on selected metal filled trenches and blocked on others, such that after a final polishing step, only those metal conductors that received the recess operation will have the capping layer.
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Gaidis Michael Christopher
Kanakasabapathy Sivananda
Lofaro Michael Francis
O'Sullivan Eugene J.
Chen Kin-Chan
International Business Machines - Corporation
Moynihan Martin D.
PRTSI, Inc.
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