Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-01-10
2006-01-10
Vu, Hung (Department: 2811)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S626000, C438S631000, C438S645000, C438S780000
Reexamination Certificate
active
06984581
ABSTRACT:
Highly porous, low-k dielectric materials are mechanically reinforced to enable the use of these low-k materials as interlayer dielectrics in advanced integrated circuits such as those which incorporate highly porous ILD materials in a Cu damascene interconnect technology. An integrated circuit, embodying such a mechanically reinforced ILD generally includes a substrate having interconnected electrical elements therein, a first dielectric layer disposed over the substrate, a plurality of electrically insulating structures disposed on the first dielectric layer, and a second dielectric layer disposed on the first dielectric layer such that the second dielectric surrounds the plurality of structures. A process, for making a mechanically reinforced, highly porous, low-k ILD, generally includes forming a first dielectric layer on a substrate, patterning the first dielectric layer such that a plurality of structures are formed, the structures each having a top surface, forming a second dielectric layer over and adjacent to the structures, the second dielectric layer having a top surface, and polishing the second dielectric layer such that its top surface is substantially even with the top surfaces of the structures. The structures may be rectangular posts, or more geometrically complex forms. The structures may be identical, or a combination of various forms.
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International Search Report PCT/US 01/44662.
International Preliminary Examining Authority PCT/US01/44662.
Blakely Sokoloff Taylor and Zafman
Intel Corporation
Vu Hung
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