Strobe technique for time stamping a digital signal

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction

Reexamination Certificate

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Reexamination Certificate

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07574632

ABSTRACT:
A system and apparatus generates a time-stamp to identify and record the time of an event such as an edge received in a data signal or clock signal. A set of strobe pulses can be generated by routing an external clock signal to delay elements with incrementally increasing delay values. A data signal or device under test clock signal can be applied to the input to each of a set of latches which are clocked by the strobe pulses. The set of latches can thereby capture a series of samples of the data signal or clock signal. The series of samples can be encoded as an edge time within a clock cycle. A clock cycle counter can be added to the edge time to generate the time stamp.

REFERENCES:
patent: 3363183 (1968-01-01), Bowling et al.
patent: 3471790 (1969-10-01), Kaps
patent: 3612906 (1971-10-01), Kennedy
patent: 3947697 (1976-03-01), Archer et al.
patent: 3997740 (1976-12-01), Eubank et al.
patent: 4119910 (1978-10-01), Hayashi
patent: 4488108 (1984-12-01), Treise et al.
patent: 4686458 (1987-08-01), Beyerbach et al.
patent: 4989202 (1991-01-01), Soto et al.
patent: 5003194 (1991-03-01), Engelhard
patent: 5084669 (1992-01-01), Dent
patent: 5258968 (1993-11-01), Matsuda et al.
patent: 5293079 (1994-03-01), Knoch
patent: 5321700 (1994-06-01), Brown et al.
patent: 5381100 (1995-01-01), Hayashi
patent: 5483534 (1996-01-01), Ohki et al.
patent: 5499190 (1996-03-01), Takahashi et al.
patent: 5568071 (1996-10-01), Hoshino et al.
patent: 5818849 (1998-10-01), Komatsu
patent: 6173207 (2001-01-01), Eidson
patent: 6198700 (2001-03-01), Sassoon
patent: 6204710 (2001-03-01), Goetting et al.
patent: 6233528 (2001-05-01), Lai et al.
patent: 6285722 (2001-09-01), Banwell et al.
patent: 6291981 (2001-09-01), Sartschev
patent: 6377065 (2002-04-01), Le et al.
patent: 6437589 (2002-08-01), Sugano
patent: 6556640 (2003-04-01), Baba
patent: 6606360 (2003-08-01), Dunning et al.
patent: 6643810 (2003-11-01), Whetsel
patent: 6715111 (2004-03-01), Self et al.
patent: 6735543 (2004-05-01), Douskey et al.
patent: 6771061 (2004-08-01), Sartschev et al.
patent: 6868047 (2005-03-01), Sartschev et al.
patent: 7054374 (2006-05-01), Jensen et al.
patent: 7266738 (2007-09-01), Sato
patent: 2003/0046622 (2003-03-01), Whetsel
patent: 2004/0260492 (2004-12-01), Halle et al.
patent: 2005/0157780 (2005-07-01), Werner et al.
patent: 2005/0157781 (2005-07-01), Ho et al.
patent: 2007/0091991 (2007-04-01), Sartschev et al.
patent: 2007/0126487 (2007-06-01), Sartschev et al.
patent: WO/20072038233 (2007-04-01), None
International Search Report and Written Opinion for Application No. PCT/US06/37100 mailed on Sep. 25, 2007, 10 pages.
International Search Report and Written Opinion of Application No. PCT/US06/37099 mailed on Sep. 18, 2007, 6 pages.
International Search Report and Written Opinion for Application No. PCT/US2006/036912 mailed on Oct. 30. 2008, 11 pages.
Eby G. Friedman, “Clock Distribution Networks in Synchronous Digital Integrated Circuits”, Proceedings of the IEEE, vol. 89, No. 5, May 2001, pp. 665-692.
Grochowski et al., “Integrated Circuit Testing for Quality Assurance in Manufacturing: History, Current Status, and Future Trends”, IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, vol. 44, No. 8, Aug. 1997, pp. 610-633.
Chang et al., “A Wide-Range Delay-Locked Loop With a Fixe Latency of One Clock Cycle”, IEEE Journal of Solid-State Circuits, vol. 37, No. 8, Aug. 2002, pp. 1021-1027.
Dr. Paul D. Franzon, ECE 733 Class Notes, www.ece.ncsu.edu/erl/faculty/paulf.html, No. 12-47, dated 2003.
Office Action for U.S. Appl. No. 11/234,542 dated Jan. 21, 2009.
Office Action for U.S. Appl. No. 11/234,542 dated Jul. 9, 2008.
Notice of Allowance for U.S. Appl. No. 11/234,599 dated Jan. 12, 2009.
Office Action for U.S. Appl. No. 11/234,599 dated Aug. 29, 2008.

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