Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2008-03-12
2010-12-14
Nguyen, Hiep T (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
Reexamination Certificate
active
07853751
ABSTRACT:
A method of improving a serial IO operation, where the serial IO operation includes at least one of a read operation of a data block and a write operation of a data block, and the serial IO operation is directed to a logical disk of a computerized data storage system. Only one stripe of data is read from the logical disk into a cache, and it is determined whether the data block for the IO operation is included within the cache. When the data block for the IO operation is included within the cache, then for a read operation, the IO operation is serviced from the cache. For a write operation, the cache is updated with the data block to be written, and only an updated parity block is written to the logical disk. When the data block for the IO operation is not included within the cache, then for a read operation, only one new stripe of data that includes the data block is read from the logical disk into the cache, and the IO operation is serviced from the cache. For a write operation, only one new stripe of data that excludes the data block is read from the logical disk into the cache, the cache is updated with the data block to be written, and only an updated parity block is written to the logical disk.
REFERENCES:
patent: 5315602 (1994-05-01), Noya et al.
patent: 7076606 (2006-07-01), Orsley
patent: 2004/0068612 (2004-04-01), Stolowitz
patent: 2006/0036904 (2006-02-01), Yang
patent: 2008/0040553 (2008-02-01), Ash et al.
LSI Corporation
Luedeka Neely & Graham P.C.
Nguyen Hiep T
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