Strip of semiconductor package

Details Strip of semiconductor package Strip of semiconductor package

1999-08-04

2002-04-09

Potter, Roy (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

C257S669000

Reexamination Certificate

active

06369439

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a strip of semiconductor package and more particularly to a strip having a plurality of separation holes and a plurality of slots, substrate areas thereof are surrounded by separation holes and slots.
2. Description of the Related Art
When the strip is in the packaging process under high temperatures, the different CTE (Coefficient of Thermal Expansion) of the strip and semiconductor devices attached thereon results in thermal mismatch that can result in the warpage of the strip. Warpage of the strip effects stress to the chip attached thereon; it damages or breaks the chips of the semiconductor devices.
Referring to
FIG. 1
, a conventional strip
100
includes a plurality of substrates
110
arranged adjacent to one another. Substrate
110
further has a hole
111
which is adhesively attached to a chip
120
by an adhesive layer. The strip
100
further includes a plurality of guide holes
101
for carrying, a plurality of position holes
102
for processing and a plurality of separation-elongated holes
103
in the transverse direction.
FIG. 2
shows the warpage in the longitudinal direction which causes the strip
100
to bend between the two distal ends. Because the separation-elongated holes
103
are arranged side-by-side along the longitudinal direction of the strip
100
, it reduces the stress in the transverse direction of the chip
120
which results from the warpage of the strip
100
. In addition, the width of the chip
120
offers enhanced resistance to the stress of the warpage; there is little chance of breaking the chip
120
in the longitudinal direction.
FIG. 3
shows the warpage in the transverse direction makes the strip
100
bend between the two distal sides. Because the separation-elongated holes
103
are not arranged in the transverse direction of the strip
100
, there is no chance to reduce the stress in the transverse direction of the chip
120
and this results from the warpage of the strip
100
. In addition, the length of the chip
120
offers a weak resistance to the stress of warpage; it has more chance to break the chip
120
in the transverse direction.
The present invention intends to provide a strip with a plurality of slots which is arranged adjacent to substrate areas in such a way as to mitigate and overcome the above problem. Moreover, the strip has a plurality of substrate areas and a metal layer which surround the substrate areas; the metal layer increases the stiffness of the entirety of the strip.
SUMMARY OF THE INVENTION
The primary objective of this invention is to provide a strip of semiconductor package which includes a plurality of slots arranged side-by-side in the transverse direction of the strip in order to reduce the stress affecting the substrate areas which results from the warpage of other substrate areas in the transverse direction of the strip.
The secondary objective of this invention is to provide a strip of semiconductor package which includes a metal layer surrounding the substrate areas to increase the stiffness of the entirety of the strip.
The present invention is a strip of semiconductor package in accordance with an embodiment; a strip substantially includes a plurality of guide holes, a plurality of position holes, a plurality of separation holes, a plurality of second slots and a plurality of substrate areas. Guide holes are arranged on two sides of the strip for carrying during processing, and position holes are arranged at four comers of the strip for positioning on the machine during processing. Separation holes and slots are to be contiguous to the substrate areas and separate the substrate areas from one another so that the discontinuous warpage of the substrate area affects the peripheral substrate areas. This reduces the chance of breaking the chip in the substrate area. The substrate area further comprises a plurality of substrates on which holes are provided. The hole is adhesively attached to a chip and provided for wire bonding of the chip. The two ends of the substrate are adjacent to the slots to reduce the stress of other substrates in the longitudinal direction actuating to the chip during heat treating in process. The strip further includes a metal layer surrounding the substrate areas to increase the stiffness of the entirety of the strip.
Other objectives, advantages and novel features of the invention will become more apparent from the following detailed description and the accompanying drawings.


REFERENCES:
patent: 6021563 (2000-02-01), Heo et al.

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