Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2007-07-17
2007-07-17
Smith, Bradley (Department: 2891)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S612000, C257SE21514
Reexamination Certificate
active
10815968
ABSTRACT:
A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a solder bump that is disposed upon the lower surface. The stress-relief layer flows against the solder bump. A stress-compensation collar is formed on a board to which the substrate is mated and the SCC partially embeds the solder bump. An article that exhibits a stress-relief layer and a stress-compensation collar is also included. A computing system that includes a stress-relief layer and a stress-compensation collar is also included.
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Bin Basiron Mohd Erwan P.
Chin Yoong Tatt P.
Jayaraman Saikumar
Lim Sheau Hooi
Suh Daewoong
Intel Corporation
Schwegman Lundberg Woessner & Kluth P.A.
Smith Bradley
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