Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With stress relief
Patent
1999-12-28
2000-11-14
Ngo, Ngan V.
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With stress relief
257676, 257692, 257704, 257622, H01L 23495, H01L 2348, H01L 2312
Patent
active
061473979
ABSTRACT:
A stress-isolated integrated circuit includes a semiconductor die (24) having first and second surfaces (28, 32) and a semi-circumferential trench (44) formed into the first surface of the die to define a stress-isolated region (48). At least some of the active IC components are located in the stress-isolated region. A cavity (46) is formed into the second surface of the die, the cavity being sized so that the trench opens into the cavity to create a cantilevered stress-isolated region extending from the remainder of the die. The second surface of the die is secured to a lead frame (36), the lead frame having bond wires (42) secured to bond pads (26) on the die. A molding compound (54) encapsulates the die, the cap, the bond wires and a portion of the lead frame to create a molded IC device (20). The invention helps to improve performance characteristics and component variables of analog and mixed-signal integrated circuits by isolating critical portions of the integrated circuits from detrimental packaging and molding stresses.
REFERENCES:
patent: 5506425 (1996-04-01), Whitney et al.
patent: 5898574 (1999-04-01), Tan et al.
Bryzek Janusz
Burns David W.
Maxim Integrated Products
Ngo Ngan V.
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